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PSS30S71F6 Datasheet, PDF (3/12 Pages) Mitsubishi Electric Semiconductor – Dual-In-Line Package Intelligent Power Module
< Dual-In-Line Package Intelligent Power Module >
PSS30S71F6
TRANSFER MOLDING TYPE
INSULATED TYPE
ELECTRICAL CHARACTERISTICS (Tj = 25°C, unless otherwise noted)
INVERTER PART
Symbol
Parameter
Condition
Limits
Unit
Min. Typ. Max.
VCE(sat)
VEC
ton
tC(on)
toff
tC(off)
trr
ICES
Collector-emitter saturation
voltage
FWDi forward voltage
VD=VDB = 15V, VIN= 5V
VIN= 0V, -IC= 30A
IC= 30A, Tj= 25°C
IC= 30A, Tj= 125°C
Switching times
VCC= 300V, VD= VDB= 15V
IC= 30A, Tj= 125°C, VIN= 0↔5V
Inductive Load (upper-lower arm)
Collector-emitter cut-off
current
VCE=VCES
Tj= 25°C
Tj= 125°C
-
1.40 1.90
V
-
1.50 2.00
-
1.50 2.00
V
0.95 1.55 2.15 μs
-
0.50 0.80 μs
-
1.75 2.35 μs
-
0.40 0.60 μs
-
0.30
-
μs
-
-
1
mA
-
-
10
CONTROL (PROTECTION) PART
Symbol
Parameter
Condition
Limits
Unit
Min. Typ. Max.
ID
Circuit current
IDB
Total of VP1-VNC, VN1-VNC
Each part of VUFB- VUFS,
VVFB- VVFS, VWFB- VWFS
VD=15V, VIN=0V
VD=15V, VIN=5V
VD=VDB=15V, VIN=0V
VD=VDB=15V, VIN=5V
-
-
6.00
-
-
6.00
mA
-
-
0.55
-
-
0.55
VSC(ref)
Short circuit trip level
VD = 15V
(Note 2) 0.45
0.48
0.51
V
UVDBt
P-side Control supply
Trip level
10.0
-
12.0
V
UVDBr
UVDt
under-voltage protection(UV)
Tj ≤125°C
N-side Control supply
Reset level
Trip level
10.5
-
12.5
V
10.3
-
12.5
V
UVDr
under-voltage protection(UV)
Reset level
10.8
-
13.0
V
VOT
Temperature Output
Pull down R=5kΩ (Note 3) LVIC Temperature=90°C
2.51 2.64 2.76
V
VFOH
VFOL
Fault output voltage
VSC = 0V, FO terminal pulled up to 5V by 10kΩ
VSC = 1V, IFO = 1mA
4.9
-
-
V
-
-
0.95
V
tFO
Fault output pulse width
CFO=22nF
(Note 4) 1.6
2.4
-
ms
IIN
Input current
VIN = 5V
0.70 1.00 1.50 mA
Vth(on)
ON threshold voltage
-
2.10 2.60
Vth(off)
Vth(hys)
OFF threshold voltage
ON/OFF threshold
hysteresis voltage
Applied between UP, VP, WP, UN, VN, WN-VNC
0.80 1.30
-
V
0.35 0.80
-
VF
Bootstrap Di forward voltage IF=10mA including voltage drop by limiting resistor (Note 5) 0.5
0.9
1.3
V
R
Built-in limiting resistance Included in bootstrap Di
16
20
24
Ω
Note 2 : SC protection works only for N-side IGBT. Please select the external shunt resistance such that the SC trip-level is less than 2.0 times of the current rating.
3 : DIPIPM don't shutdown IGBTs and output fault signal automatically when temperature rises excessively. When temperature exceeds the protective level that
user defined, controller (MCU) should stop the DIPIPM. Temperature of LVIC vs. VOT output characteristics is described in Fig. 3.
4 : Fault signal Fo outputs when SC or UV protection works. Fo pulse width is different for each protection modes. At SC failure, Fo pulse width is a fixed width
which is specified by the capacitor connected to CFO terminal. (CFO=9.1 x 10-6 x tFO [F]), but at UV failure, Fo outputs continuously until recovering from UV
state. (But minimum Fo pulse width is the specified time by CFO.)
5 : The characteristics of bootstrap Di is described in Fig.2.
Fig. 2 Characteristics of bootstrap Di VF-IF curve (@Ta=25°C) including voltage drop by limiting resistor (Right chart is enlarged chart.)
800
700
600
500
400
300
200
100
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
VF [V]
50
45
40
35
30
25
20
15
10
5
0
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
VF [V]
Publication Date : December 2013
3