M35053 Datasheet, PDF (4/47 Pages) Mitsubishi Electric Semiconductor – SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
MEMORY CONSTITUTION
Address 0016 to EF16 are assigned to the display RAM, address F016
to F816 are assigned to the display control registers.
The internal circuit is reset and all display control registers (address
F016 to F816) are set to “0” and display RAM (address 0016 to EF16)
__
are RAM erased when the AC pin level is “L”.
Set “0” in any of bits DAD through DAF of addresses 0016 through
EF16, and of bits DAE and DAF of addresses F016 through F816.
TESTn (n : a number) is MITSUBISHI test memory, so be sure to
observe the setting conditions.
Bit
Address ^{DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0}
Remarks
0016 0 0 0 REV BLINK EC2 EC1 EC0 C7 C6 C5 C4 C3 C2 C1 C0
Reversed
character
Blinking
Encode data or
character color
Character code
Display RAM
EF16 0
F016 0
F116 0
F216 0
F316 0
F416 0
F516 0
F616 0
F716 0
0 0 REV BLINK EC2 EC1 EC0 C7 C6 C5 C4 C3 C2 C1 C0
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0 TEST25 W/R TEST11 TEST10 DECB1DECB0 SYSEP1 SYSEP0 SEPV1 SEPV0 PTD1 PTD0 PTC1 PTC0 Port output specify and so on
0
TEST26 DVP4 DVP3 DVP2 DVP1 DVP0 HP7
HP6
HP5
HP4
HP3
HP2
HP1
HP0
Horizontal display start position and
Decode position specify
0
TEST27 EVP4 EVP3 EVP2 EVP1 EVP0 VP7
VP6
VP5
VP4
VP3
VP2
VP1
VP0
Vertical display start position and
Encode position specify
0
TEST28
___
D/V
EFLD1 EFLD0 DFLD1 DFLD0 VSZ21
VSZ20
VSZ11
VSZ10 HSZ21 HSZ20 HSZ11 HSZ10
Character size and Encode EDecode
specify
0 TEST29 TEST14 TEST13 SPACE DSP9 DSP8 DSP7 DSP6 DSP5 DSP4 DSP3 DSP2 DSP1 DSP0 ^{Display mode specify}
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0 TEST30 TEST19 MB/LB TEST17 TEST16 TEST15 EQP PALH MPAL INT/NON N/P BLINK2 BLINK1 BLINK0 ^{Blinking specify and so on}
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0 TEST31 TEST2 TEST1 TEST0 LBLACK LIN24/32 BLKHF BB BG BR LEVEL0 PHASE2 PHASE1 PHASE0 ^{Raster color specify}
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0 TEST32 TEST24 RGBON TEST22 CL17/18 CBLINK CURS7 CURS6 CURS5 CURS4 CURS3 CURS2 CURS1 CURS0 ^{Cursor display specify}
F816 0 0 LEVEL1 EHP4 _{EHP3 EHP2} EHP1 EHP0 RAMERS DSPON STOP1 STOPIN SCOR EX BLK1 BLK0 Control display and so on
Fig. 1 Memory constitution (M35053-XXXSP/FP)
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