M35053 Datasheet, PDF (12/47 Pages) Mitsubishi Electric Semiconductor – SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(6) Address F516
DA
Register
0~D
Status
Contents
Function
0
0
BLINK0
1
0
1
BLINK1
1
BLINK0
0
0
1
1
BLINK1
0
1
0
1
Duty
Blinking off
25%
50%
75%
2
BLINK2
0
Division of vertical synchronizing signal into 1/64.
Cycle approximately 1 second.
1
Division of vertical synchronizing signal into 1/32.
Cycle approximately 0.5 second.
_
3
N/P
_ _ _ _ _ _
4
INT/NON
5
MPAL
6
PALH
0
NTSC, M-PAL mode
1
PAL mode
0
Interlace
1
Non interlace
_
N/P
MPAL
Synchronous mode
0
0
0
NTSC
0
1
M-PAL
1
1
0
PAL
1
1
Not available
__
PALH
INT/NON Number of scanning lines
0
0
625H lines
0
1
626H lines
1
0
627H lines
1
1
628H lines
7
EQP
8
TEST15
9
TEST16
A
TEST17
_ _ _ _ _ _ _ _ _ _ _ _ _ _
B
MB/LB
C
TEST19
D
TEST30
0
Not include the equivalent pulse.
1
Include the equivalent pulse.
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
0
Output from MSB side
1
Output from LSB side
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
Note. To blink a character, set 1 to DAB (the blinking bit) of the display RAM.
Remarks
Blinking duty ratio can be
altered. (Note)
Blinking cycle can be altered.
Refer to register MPAL
Scanning lines control (only in
internal synchronization)
Synchronizing signal i_{_}s selected
with this register and N/P
register.
It should be fixed to “0” at NTSC
Effective only at non-interlace
Setting the decode data output
form
12