M35053 Datasheet, PDF (15/47 Pages) Mitsubishi Electric Semiconductor – SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS

MITSUBISHI MICROCOMPUTERS
M35053-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(9) Address F816
DA
Register
0~D
0
BLK0
1
BLK1
Status
0
1
0
1
Contents
Function
BLK1
0
0
1
1
BLK0 DSPn= “1”
DSPn= “0”
0
Matrix-outline
border size
Matrix-outline size
1
Border size ^{Character size}
0 Matrix-outline size Border size
1 Character size Matrix-outline size
Remarks
Display mode
(BLNK output) variable
2
EX
3
SCOR
0
External synchronization
1
Internal synchronization
0
Superimpose monotone display
1
Superimpose coloring display (only NTSC)
Synchronizing signal switching
(Note1)
“1” setting is forbidden at internal
synchronous or PAL, M-PAL
mode displaying.
0
fSC input mode
4
STOPIN
1
Can not be used.
OSCIN oscillation control
0
Oscillation VCO for display
5
STOP1
1
Stop oscillation VCO for display
Control oscillation VCO for
display
6
DSPON
0
Display OFF
1
Display ON
0
RAM not erased
7
RAMERS
1
RAM erased
This register does not exist
(Note 3).
8
EHP0
0
Let encode data programming start position be EHS, Set encode start position by use
1
of EHP4 through EHP0.
9
EHP1
0
EHS
=
4
Σ
2ⁿEHPn
n=0
1
EHP4 to EHP0 = (00000) to
(01111) is setting forbidden.
0
A
EHP2
1
Refer to encode function (3)
0
B
EHP3
1
0
C
EHP4
1
D
LEVEL1
0
Internal bias OFF
1
Internal bias ON
Generates bias potential for decod-
ing and synchronous separation.
Notes 1. In dealing with the internal synchronization, cut off external video signals outside the IC. The leakage of external input video signals
can be avoided.
Notes 2. In displaying color superimposition, enter into the OSCIN pin the fSC signal that phase-synchronizes with the color burst of the
composite video signals (input to the CVIN pin).
Notes 3. Erases all the display RAM. The character code turns to blank-FF16, the encode data bit and the blinking bit turn to “1” respectively,
and reversed character bit turns to “0”.
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