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M32C Datasheet, PDF (343/441 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Udnedveerlopment Rev.B2 for proof reading
Usage precaution
Mitsubishi Microcomputers
M32C/83 group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Table 1.31.3 The object registers
Register name
Symbol
Watchdog timer start register
WDTS
Group0 receive input register
G0RI
Group1 receive input register
G1RI
Group2 SI/O transmit buffer register
G2TB
UART4 bit rate generator
U4BRG
UART4 transfer buffer register
U4TB
Timer A1-1 register
TA11
Timer A2-1 register
TA21
Timer A4-1 register
TA41
Dead time timer
DTT
Timer B2 interrupt occurrence frequency set counter
ICTB2
UART3 bit rate generator
U3BRG
UART3 transfer buffer register
U3TB
UART2 bit rate generator
U2BRG
UART2 transfer buffer register
U2TB
Up-down flag
Timer A0 register (Note)
Timer A1 register (Note)
Timer A2 register (Note)
Timer A3 register (Note)
Timer A4 register (Note)
UDF
TA0
TA1
TA2
TA3
TA4
UART0 bit rate generator
U0BRG
UART0 transfer buffer register
U0TB
UART1 bit rate generator
U1BRG
UART1 transfer buffer register
U1TB
A-D0 control register 2
ADCON2
Note: In one-shot timer mode and pulse width modulation mode.
Address
000E16
00EC16
012C16
016D16, 016C16
02F916
02FB16, 02FA16
030316, 030216
030516, 030416
030716, 030616
030C16
030D16
032916
032B16, 032A16
033916
033B16, 033A16
034416
034716, 034616
034916, 034816
034B16, 034A16
034D16, 034C16
034F16, 034E16
036916
036B16, 036A16
02E916
02EB16, 02EA16
039416
Notes on the microprocessor mode and transition after shifting from the micropro-
cessor mode to the memory expansion mode / single-chip mode
In microprocessor mode, the SFR, internal RAM, and external memory space can be accessed.
For that reason, the internal ROM area cannot be accessed.
After the reset has been released and the operation of shifting from the microprocessor mode has started
(“H” applied to the CNVSS pin), the internal ROM area cannot be accessed even if the CPU shifts to the
memory expansion mode or single-chip mode.
Notes on CNVss pin reset at "H" level
When the CNVss pin is reset at "H" level, the contents of internal ROM cannot be read out.
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