M38258MCM Datasheet, PDF(24/70 Page) Mitsubishi Electric Semiconductor

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M38258MCM Datasheet, PDF (24/70 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

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MITSUBISHI MICROCOMPUTERS

3825 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

Timer 1, Timer 2, Timer 3

Timer 1, timer 2, and timer 3 are 8-bit timers. The count source for

each timer can be selected by timer 123 mode register. The timer

latch value is not affected by a change of the count source. How-

ever, because changing the count source may cause an inadvert-

ent count down of the timer, rewrite the value of timer whenever

the count source is changed.

qTimer 2 Write Control

If the timer 2 write control bit is â0â, when the value is written in the

address of timer 2, the value is loaded in the timer 2 and the latch

at the same time.

If the timer 2 write control bit is â1â, when the value is written in the

address of timer 2, the value is loaded only in the latch. The value

in the latch is loaded in timer 2 after timer 2 underflows.

qTimer 2 Output Control

When the timer 2 (TOUT) is output enabled, an inversion signal

from pin TOUT is output each time timer 2 underflows.

In this case, set the port P56 shared with the TOUT pin to the out-

put mode.

sNote on Timer 1 to Timer 3

When the count source of timers 1 to 3 is changed, the timer

counting value may be changed large because a thin pulse is gen-

erated in count input of timer . If timer 1 output is selected as the

count source of timer 2 or timer 3, when timer 1 is written, the

counting value of timer 2 or timer 3 may be changed large be-

cause a thin pulse is generated in timer 1 output.

Therefore, set the value of timer in the order of timer 1, timer 2 and

timer 3 after the count source selection of timer 1 to 3.

Timer 123 mode register

(T123M :address 002916)

TOUT output active edge switch bit

0 : Start at âHâ output

1 : Start at âLâ output

TOUT output control bit

0 : TOUT output disabled

1 : TOUT output enabled

Timer 2 write control bit

0 : Write data in latch and counter

1 : Write data in latch only

Timer 2 count source selection bit

0 : Timer 1 output

1 : f(XIN)/16

(or f(XCIN)/16 in low-speed mode)

Timer 3 count source selection bit

0 : Timer 1 output

1 : f(XIN)/16

(or f(XCIN)/16 in low-speed mode)

Timer 1 count source selection bit

0 : f(XIN)/16

(or f(XCIN)/16 in low-speed mode)

1 : f(XCIN)

Not used (return â0â when read)

Note : Internal clock Ï is f(XCIN)/2 in the low-speed mode.

Fig. 20 Structure of timer 123 mode register

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