MT90812 Datasheet, PDF (27/105 Pages) Mitel Networks Corporation – Integrated Digital Switch (IDX)

Advance Information
MT90812
Source and Destination Streams
2.048 Mb/s
Expansion Bus Data Rate
4.096 Mb/s
8.192 Mb/s
Sti0/1 -> Sto0/1
Est0/1 -> Est0/1
Sti0/1 -> Est0/1
Est0/1 -> Sto0/1
N/A
m>=n+2
m>=2n+3
m>=n+2
m>=(n+3)/2
Table 6 - Output Channels for Minimum Delay
N/A
m>=4n+5
m>=(n+5)/4
The output channel number m, specified for minimum delay in these four cases account for there being two
4.096Mb/s channels and four 8.192Mb/s channels for every one 2.048Mb/s channel.
Table 7 lists the condition required for a throughput delay of less than one frame period, the throughput delay if
this condition is met and the throughput delay expressed in timeslots when switching is made in the following
frame. For cases where there are different data rates the delay is expressed in timeslots associated with the
fastest data rate. i.e. with the source channel from Est1 (@8Mb/s) and destination channel on STo1 (@2Mb/s)
the delay is expressed in 8Mb/s timeslots. If the incoming 8Mb/s channel, n = 119, outgoing 2Mb/s channel m
=31, then the delay = 4m-n = 4(31)-119= five 8Mb/s timeslots. If m=1 the delay=128-(n-4m)=128-(119-
4)=thirteen 8Mb/s timeslots.
Source and Destination
Streams
Input
channel,
n, range
Output
channel,
m, range
Condition for
switching
within same
frame
Throughput
Delay within
same frame
Throughput
Delay if
condition not
met
Sti0/1 -> Sto0/1
Est0/1 -> Est0/1 2.048
Mb/s
0-31
0-31
0-31
0-31
m>=n+2
m>=n+2
m-n t.s₂.
m-n t.s₂.
32-(n-m) t.s₂.
32-(n-m) t.s₂.
Est0/1 -> Est0/1 4.096
Mb/s
0-64
0-64
m-n t.s₄.
64-(n-m) t.s₄.
Est0/1 -> Est0/1 8.192
Mb/s
0-127
0-127
m-n t.s₈.
128-(n-m) t.s₈.
Sti0/1 -> Est0/1 2.048 Mb/
s
0-31
0-31
m>=n+2
m-n t.s₂.
32-(n-m) t.s₂.
Sti0/1 -> Est0/1 4.096 Mb/
s
0-31
0-64
m>=2n+3
m-2n t.s₄.
64-(2n-m) t.s₄.
Sti0/1 -> Est0/1 8.192 Mb/
s
0-31
0-127
m>=4n+5
m-4n t.s₈.
128-(4n-m) t.s₈.
Est0/1 2.048 Mb/s -> Sti0/
1
0-31
0-31
m>=n+2
m-n t.s₂.
32-(n-m) t.s₂.
Est0/1 4.096 Mb/s ->
Sti0/1
0-64
0-31
m>=(n+3)/2
2m-n t.s₄.
64-(n-2m) t.s₄.
Est0/1 8.192 Mb/s ->
Sti0/1
0-127
0-31
m>=(n+5)/4
4m-n t.s₈.
128-(n-4m) t.s₈.
Table 7 - Throughput Delay for Minimum Delay Mode
Notes: t.s. = time-slot. t.s₂. =2Mb/s t.s. = 3.9 us. t.s₄. =4Mb/s t.s.=1.95 us. t.s₈.=8Mb/s t.s.=0.975 us.
Delays are measured in timeslots and at the point in time from when the input channel is completely shifted in and when the output
channel is completely shifted out.
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