A3PE3000-FGG324 Datasheet, PDF (63/162 Pages) Microsemi Corporation – ProASIC3E Flash Family FPGAs with Optional Soft ARM Support

ProASIC3E Flash Family FPGAs
Table 2-78 • LVDS Minimum and Maximum DC Input and Output Levels
DC Parameter
Description
Min.
VCCI
Supply Voltage
2.375
VOL
Output Low Voltage
0.9
VOH
IOL¹
IOH¹
Output High Voltage
Output Lower Current
Output High Current
1.25
0.65
0.65
VI
Input Voltage
0
IIH²
Input High Leakage Current
IIL²
Input Low Leakage Current
VODIFF
Differential Output Voltage
250
VOCM
Output Common Mode Voltage
1.125
VICM
VIDIFF
Input Common Mode Voltage
0.05
Input Differential Voltage ²
100
Notes:
1. IOL/ IOH defined by VODIFF/(Resistor Network).
2. Currents are measured at 85°C junction temperature.
Typ.
2.5
1.075
1.425
0.91
0.91
350
1.25
1.25
350
Max.
2.625
1.25
1.6
1.16
1.16
2.925
10
10
450
1.375
2.35
Units
V
V
V
mA
mA
V
µA
µA
mV
V
V
mV
Table 2-79 • AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V)
Measuring Point* (V)
VREF (typ.) (V)
1.075
1.325
Cross point
–
Note: *Measuring point = Vtrip. See Table 2-15 on page 2-18 for a complete table of trip points.
Revision 13
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