A40MX02-FPL68 Datasheet, PDF (42/142 Pages) Microsemi Corporation – Single-Chip ASIC Alternative, 3,000 to 54,000 System Gates, Up to 2.5 kbits Configurable Dual-Port SRAM

40MX and 42MX FPGA Families
Table 1-25 • 40MX Temperature and Voltage Derating Factors
(Normalized to T_J = 25°C, VCC = 3.3 V)
Temperature
40MX Voltage –55°C
–40°C
0°C
25°C
3.00
1.08
1.12
1.21
1.26
3.30
0.86
0.89
0.96
1.00
3.60
0.83
0.85
0.92
0.96
70°C
1.50
1.19
1.14
85°C
1.64
1.30
1.25
125°C
2.00
1.59
1.53
2.20
2.00
1.80
1.60
1.40
1.20
1.00
0.80
0.60
3.00
3.30
3.60
Voltage (V)
Note: This derating factor applies to all routing and propagation delays.
Figure 1-36 • 40MX Junction Temperature and Voltage Derating Curves
(Normalized to T_J = 25°C, VCC = 3.3 V)
55˚C
40˚C
0˚C
25˚C
70˚C
85˚C
125˚C
1-38
Revision 11