A3PN015-QNG68 Datasheet, PDF (42/114 Pages) Microsemi Corporation – ProASIC3 nano Flash FPGAs

ProASIC3 nano DC and Switching Characteristics
Table 2-36 • 3.3 V LVCMOS Wide Range Low Slew
Commercial-Case Conditions: T_J = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.7 V
Software Default Load at 35 pF for A3PN020, A3PN015, A3PN010
Drive
Strength
Equivalent
Software
Default
Drive
Strength
Option¹
Speed
Grade
100 µA
2 mA
Std.
t_DOUT
0.60
t_DP
8.20
t_DIN t_PY t_PYS t_EOUT
0.04 1.57 2.18 0.43
t_ZL
8.20
t_ZH
7.68
t_LZ
3.26
t_HZ Units
3.38 ns
–1
0.51 6.97 0.04 1.33 1.85 0.36 6.97 6.53 2.77 2.87 ns
–2
0.45 6.12 0.03 1.17 1.62 0.32 6.12 5.73 2.43 2.52 ns
100 µA
4 mA
Std. 0.60 8.20 0.04 1.57 2.18 0.43 8.20 7.68 3.26 3.38 ns
–1
0.51 6.97 0.04 1.33 1.85 0.36 6.97 6.53 2.77 2.87 ns
–2
0.45 6.12 0.03 1.17 1.62 0.32 6.12 5.73 2.43 2.52 ns
100 µA
6 mA
Std. 0.60 6.42 0.04 1.57 2.18 0.43 6.42 6.05 3.72 4.16 ns
–1
0.51 5.46 0.04 1.33 1.85 0.36 5.46 5.14 3.17 3.54 ns
–2
0.45 4.79 0.03 1.17 1.62 0.32 4.79 4.52 2.78 3.11 ns
100 µA
8 mA
Std. 0.60 6.42 0.04 1.57 2.18 0.43 6.42 6.05 3.72 4.16 ns
–1
0.51 5.46 0.04 1.33 1.85 0.36 5.46 5.14 3.17 3.54 ns
–2
0.45 4.79 0.03 1.17 1.62 0.32 4.79 4.52 2.78 3.11 ns
Notes:
1. The minimum drive strength for any LVCMOS 3.3 V software configuration when run in wide range is ±100 µA. Drive
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-5 for derating values.
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Revision 11