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HAL1000UT-A Datasheet, PDF (24/30 Pages) Micronas – Programmable Hall Switch
HAL 1000
DATA SHEET
5. Programming of the Sensor
5.1. Definition of Programming Pulses
The sensor is addressed by modulating a serial tele-
gram on the supply voltage. The sensor answers with
a serial telegram which is available on the output pin.
The bits in the serial telegram have a different bit time
for the VDD-line and the output. The bit time for the
VDD-line is defined through the length of the Sync Bit
at the beginning of each telegram. The bit time for the
output is defined through the Acknowledge Bit.
A logical “0” is coded as no voltage change within the
bit time. A logical “1” is coded as a voltage change
between 50% and 80% of the bit time. After each bit, a
voltage change occurs.
5.2. Definition of the Telegram
Each telegram starts with the Sync Bit (logical 0),
3 bits for the Command (COM), the Command Parity
Bit (CP), 4 bits for the Address (ADR), and the
Address Parity Bit (AP).
There are 4 kinds of telegrams:
– Write a register (see Fig. 5–2)
After the AP Bit, follow 14 Data Bits (DAT) and the
Data Parity Bit (DP). If the telegram is valid and the
command has been processed, the sensor answers
with an Acknowledge Bit (logical 0) on the output.
– Read a register (see Fig. 5–3)
After evaluating this command, the sensor answers
with the Acknowledge Bit, 14 Data Bits, and the
Data Parity Bit on the output.
– Programming the EEPROM cells (see Fig. 5–4)
After processing this command, the sensor answers
with the Acknowledge Bit. After the delay time tw,
the supply voltage rises up to the programming volt-
age.
tr
tf
VDDH
logical 0
tp0
or
tp0
VDDL
VDDH
logical 1
VDDL
tp0
tp1
tp1
or
tp0
Fig. 5–1: Definition of logical 0 and 1 bit
Table 5–1: Telegram parameters
Symbol
VDDL
VDDH
tr
tf
tp0
tpOUT
tp1
VDDPROG
tPROG
trp
tfp
tw
Parameter
Supply Voltage for Low Level
during Programming
Supply Voltage for High Level
during Programming
Rise Time
Fall Time
Bit Time on VDD
Bit Time on Output Pin
Pin No.
1
Min.
5
1
6.8
1
−
1
−
1
1.7
3
2
Voltage Change for Logical 1
1, 3
Supply Voltage for
1
Programming the EEPROM
Programming Time for EEPROM
1
Rise Time of Programming Voltage 1
Fall Time of Programming Voltage
1
Delay Time of Programming Voltage 1
after Acknowledge
50
12.4
95
0.2
0
0.5
Typ.
5.6
8.0
−
−
1.75
3
65
12.5
100
0.5
−
0.7
Max. Unit
6
V
8.5
V
0.05 ms
0.05 ms
1.8
ms
4
ms
80
%
12.6 V
105
ms
1
ms
1
ms
1
ms
Remarks
tp0 is defined through the Sync Bit
tpOUT is defined through the
Acknowledge Bit
% of tp0 or tpOUT
24
Feb. 3, 2009; DSH000015_003EN
Micronas