VCT38XXA Datasheet, PDF (122/172 Pages) Micronas – Video/Controller/Teletext IC Family

VCT 38xxA
5.16.3.Initialization
Prior to entering active mode, proper SW initialization
of the Ports assigned to function as TVPWM output
has to be made. The ports have to be configured Spe-
cial Out (see Section 5.18. on page 126).
5.16.4.Operation
After reset, the TVPWM is in standby mode (inactive)
and the output signal TVPWM is Low.
For entering active mode, the enable bit in the corre-
sponding standby register has to be set (see Section
5.5. on page 89). The desired pulse width value is then
written into the registers TVPWML and TVPWMH. The
TVPWM will start producing its output signal immedi-
ately after the next subsequent load pulse.
During active mode, a new pulse width value is set by
simply writing to the register TVPWML and TVPWMH.
Writing TVPWMH will update the comparator and the
extension logic with the new register values. Upon the
next subsequent load pulse the TVPWM will start pro-
ducing an output signal with the new pulse width value,
starting with a High level.
Returning the TVPWM to standby mode by resetting
its respective enable flag will not reset its output signal.
The state of the counters and the extension logic is not
readable.
5.16.5.TVPWM Registers
1F4A 274:
bit
7
w
reset
275: TVPWML
6
5
0
TV 276: PWM Low Byte
4
3
2
1
0
Pulse width value Low
0
0
0
0
0
1F4B 277:
bit
7
w
reset
0
278: TVPWMH
TV 279: PWM High Byte
6
5
4
3
2
1
0
Pulse width value High
0
0
0
0
0
0
0
TVPWM has to be written Low byte first.
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