VCT38XXA Datasheet, PDF (110/172 Pages) Micronas – Video/Controller/Teletext IC Family

VCT 38xxA
ADVANCE INFORMATION
WR_Data (subaddress=control info)
D₀ to D₇
Address
Decoder
half full
empty
WR
Write
FIFO
5 x 11
Clock Prescaler
control
0
1
clk = f_OSC
SR2.I2C
Terminal 1
SDA/SCL
2
in
SR out
busy
Write Logic
Read
FIFO
3x8
empty
D₀ to D₇ RD_Data
Read Logic
SR
Q
SR
Q
2
Terminal 2
P22/P23
P36/P37
Start Condition
resets ACK flags
Status Register
I2C
Interrupt
Source
D₀ to D₇
RD_Status
Fig. 5–18: Block diagram of I²C bus master interface
110
Micronas