MT48LC64M4A2_03 Datasheet, PDF (7/61 Pages) Micron Technology – SYNCHRONOUS DRAM 256Mb: x4, x8, x16 SDRAM

256Mb: x4, x8, x16
SDRAM
Figure 5: Functional Block Diagram
32 Meg x 8 SDRAM
CKE
CLK
CS#
WE#
CAS#
RAS#
CONTROL
LOGIC
BANK3
BANK2
BANK1
MODE REGISTER
12
A0-A12,
BA0, BA1
15
ADDRESS
REGISTER
REFRESH ₁₃
COUNTER
ROW-
13
ADDRESS
MUX
13
BANK0
ROW-
ADDRESS
LATCH
&
DECODER
8192
BANK0
MEMORY
ARRAY
(8,192 x 1,024 x 8)
SENSE AMPLIFIERS
8192
2
BANK
CONTROL
LOGIC
2
COLUMN-
ADDRESS
10
10
COUNTER/
LATCH
I/O GATING
DQM MASK LOGIC
READ DATA LATCH
WRITE DRIVERS
1024
(x8)
COLUMN
DECODER
1
1
DATA
8
OUTPUT
REGISTER
8
DATA
8
INPUT
REGISTER
DQM
DQ0-
DQ7
PDF: 09005aef8091e6d1/Source: 09005aef8091e6a8
256MSDRAM.pmd – Rev. H; Pub. 2/05
7
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