MT48LC128M4A2 Datasheet, PDF (6/55 Pages) Micron Technology – SYNCHRONOUS DRAM

ADVANCE
512Mb: x4, x8, x16
SDRAM
FUNCTIONAL BLOCK DIAGRAM
32 Meg x 16 SDRAM
CKE
CLK
CS#
WE#
CAS#
RAS#
CONTROL
LOGIC
BANK3
BANK2
BANK1
MODE REGISTER
12
A0-A12,
BA0, BA1
15
ADDRESS
REGISTER
REFRESH ₁₃
COUNTER
ROW-
13
ADDRESS
MUX
13
BANK0
ROW-
ADDRESS
LATCH
&
DECODER
8192
BANK0
MEMORY
ARRAY
(8,192 x 1,024 x 16)
SENSE AMPLIFIERS
8192
2
BANK
CONTROL
LOGIC
2
COLUMN-
ADDRESS
10
10
COUNTER/
LATCH
I/O GATING
DQM MASK LOGIC
READ DATA LATCH
WRITE DRIVERS
1024
(x16)
COLUMN
DECODER
2
2
DATA
16
OUTPUT
REGISTER
16
DATA
16
INPUT
REGISTER
DQML,
DQMH
DQ0-
DQ15
512Mb: x4, x8, x16 SDRAM
512MSDRAM_D.p65 – Rev. D; Pub 1/02
6
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©2000, Micron Technology, Inc.