MT48LC64M4A2_99 Datasheet, PDF(59/77 Page) Micron Technology – Synchronous DRAM 256Mb: x4, x8, x16 SDRAM

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

MT48LC64M4A2_99 Datasheet, PDF (59/77 Pages) Micron Technology – Synchronous DRAM 256Mb: x4, x8, x16 SDRAM

◁

256Mb: x4, x8, x16 SDRAM

Timing Diagrams

Figure 39: Auto Refresh Mode

CLK

tCK

CKE

tCKS tCKH

tCMS tCMH

COMMAND

PRECHARGE

NOP

DQM/

DQML, DQMU

A0âA9,

A11, A12

A10

ALL BANKS

SINGLE BANK

tAS tAH

BA0, BA1

BANK(S)

DQ High-Z

tRP

Precharge all

active banks

Tn + 1

((

))

tCL

tCH

((

))

((

))

To + 1

((

))

((

))

((

))

AUTO

REFRESH

((

))

NOP( ( NOP

))

((

))

((

))

((

))

((

))

((

))

((

))

((

))

((

))

((

))

tRFC

AUTO

REFRESH

((

))

NOP( ( NOP

))

((

))

((

))

((

))

((

))

((

))

((

))

((

))

((

))

((

))

tRFC

ACTIVE

ROW

BANK

DONâT CARE

Notes: 1. tRFC must not be interrupted by any executable command; COMMAND INHIBIT or NOP

must be applied on each positive edge during tRFC.

PDF: 09005aef8091e6d1/Source: 09005aef8091e6a8

256MSDRAM_2.fm - Rev. L 10/07 EN

Micron Technology, Inc., reserves the right to change products or specifications without notice.

▷