MT48LC64M4A2_99 Datasheet, PDF (44/77 Pages) Micron Technology – Synchronous DRAM 256Mb: x4, x8, x16 SDRAM

256Mb: x4, x8, x16 SDRAM
Operations
Table 11: Truth Table 4 – Current State Bank n, Command to Bank m
Notes 1–6 apply to the entire table; notes appear below and on page 45
Current
State
Any
Idle
Row
activating,
active, or
precharging
Read
(auto
precharge
disabled)
Write
(auto
precharge
disabled)
Read
(with auto
precharge)
Write
(with auto
precharge)
CS# RAS# CAS# WE#
Command (Action)
Notes
H
X
X
X COMMAND INHIBIT (NOP/continue previous operation)
L
H
H
H NO OPERATION (NOP/continue previous operation)
X
X
X
X Any command otherwise allowed to bank m
L
L
H
H ACTIVE (Select and activate row)
L
H
L
H READ (Select column and start READ burst)
7
L
H
L
L WRITE (Select column and start WRITE burst)
7
L
L
H
L PRECHARGE
L
L
H
H ACTIVE (Select and activate row)
L
H
L
H READ (Select column and start new READ burst)
7, 10
L
H
L
L WRITE (Select column and start WRITE burst)
7, 11
L
L
H
L PRECHARGE
9
L
L
H
H ACTIVE (Select and activate row)
L
H
L
H READ (Select column and start READ burst)
7, 12
L
H
L
L WRITE (Select column and start new WRITE burst)
7, 13
L
L
H
L PRECHARGE
9
L
L
H
H ACTIVE (Select and activate row)
L
H
L
H READ (Select column and start new READ burst)
7, 8, 14
L
H
L
L WRITE (Select column and start WRITE burst)
7, 8, 15
L
L
H
L PRECHARGE
9
L
L
H
H ACTIVE (Select and activate row)
L
H
L
H READ (Select column and start READ burst)
7, 8, 16
L
H
L
L WRITE (Select column and start new WRITE burst)
7, 8, 17
L
L
H
L PRECHARGE
9
Notes:
1. This table applies when CKE_{n - 1} was HIGH and CKEn is HIGH (see Table 9 on page 41) and
after ^tXSR has been met (if the previous state was self refresh).
2. This table describes alternate bank operation, except where noted; that is, the current state
is for bank n and the commands shown are those allowed to be issued to bank m (assuming
that bank m is in such a state that the given command is allowable). Exceptions are covered
in the notes below.
3. Current state definitions:
Idle: The bank has been precharged, and ^tRP has been met.
Row active: A row in the bank has been activated, and ^tRCD has been met. No
data bursts/accesses and no register accesses are in progress.
Read: A READ burst has been initiated, with auto precharge disabled, and
has not yet terminated or been terminated.
Write: A WRITE burst has been initiated, with auto precharge disabled, and
has not yet terminated or been terminated.
Read w/auto Starts with registration of a READ command with auto precharge
precharge enabled: enabled, and ends when ^tRP has been met. After ^tRP is met, the
bank will be in the idle state.
Write w/auto Starts with registration of a WRITE command with auto precharge
precharge enabled: enabled, and ends when ^tRP has been met. After ^tRP is met, the
bank will be in the idle state.
4. AUTO REFRESH, SELF REFRESH, and LOAD MODE REGISTER commands may only be issued
when all banks are idle.
PDF: 09005aef8091e6d1/Source: 09005aef8091e6a8
256MSDRAM_2.fm - Rev. L 10/07 EN
44
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