MT48LC4M32B2B5-6G Datasheet, PDF (56/79 Pages) Micron Technology – 128Mb: x32 SDRAM MT48LC4M32B2 – 1 Meg x 32 x 4 Banks

Figure 30: Terminating a WRITE Burst
T0
T1
T2
CLK
Command
Address
WRITE
BURST
NEXT
TERMINATE COMMAND
Bank,
Col n
Address
DQ
D_IN
Data
Transitioning data
Note: 1. DQM is LOW.
Don’t Care
128Mb: x32 SDRAM
WRITE Operation
PDF: 09005aef80872800
128mb_x32_sdram.pdf - Rev. U 04/13 EN
56
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