MT28S4M16LC Datasheet, PDF (43/48 Pages) Micron Technology – SYNCFLASH MEMORY

4 MEG x 16
SYNCFLASH MEMORY
READ – FULL-PAGE BURST¹
T0
CLK
tCKS tCKH
CKE
T1
tCL
tCH
tCMS tCMH
COMMAND
ACTIVE
NOP
T2
tCK
READ
DQM
tCMS tCMH
A0–A11
tAS tAH
ROW
tAS tAH
BA
BANK
COLUMN m²
BANK
T3
NOP
tAC
DQ
tLZ
tRCD
CAS Latency
T4
NOP
T5
NOP
T6
( ( ^{Tn + 1}
))
((
))
((
))
((
))
((
))
NOP _{( (}
))
((
))
((
))
NOP
Tn + 2
Tn + 3
BURST TERM
NOP
Tn + 4
NOP
((
))
((
))
((
))
((
))
tAC
OH
DOUT m
tAC
tOH
DOUT m+1
tAC _{( (}
tOH ^{) )}
((
))
DOUT m+2_{( (}
))
tAC
tOH
DOUT m-1
tAC
tOH
DOUT m
256 (x16) locations within
the same row.
Full page completed.
Full-page burst does not self-terminate.
Can use BURST TERMINATE command.³
tOH
DOUT m+1
tHZ
DON’T CARE
UNDEFINED
TIMING PARAMETERS
SYMBOL*
t_{AC (3)}
t_{AC (2)}
t_{AC (1)}
t_AH
t_AS
t_CH
t_CL
t_{CK (3)}
t_{CK (2)}
t_{CK (1)}
-10
MIN
MAX
7
9
27
2
3
3.5
3.5
10
15
30
-12
MIN
MAX
9
10
27
2
3
4
4
12
15
30
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
*CAS latency indicated in parentheses.
SYMBOL*
t_CKH
t_CKS
t_CMH
t_CMS
t_{HZ (3)}
t_{HZ (2)}
t_{HZ (1)}
t_LZ
t_OH
t_RCD
-10
MIN
MAX
2
3
2
3
8
10
15
2
3
30
-12
MIN
MAX
2
3
2
3
9
10
15
2
3
30
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTE: 1. For this example, the CAS latency = 2.
2. x16: A0–A7.
4 Meg x 16 SyncFlash
MT28S4M16LC_6.p65 – Rev. 6, Pub. 9/01
43
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©2001, Micron Technology, Inc.