MT47H128M16RT-25EC Datasheet, PDF (37/134 Pages) Micron Technology – DDR2 SDRAM MT47H512M4 – 64 Meg x 4 x 8 banks MT47H256M8 – 32 Meg x 8 x 8 banks MT47H128M16 – 16 Meg x 16 x 8 banks

Table 12: AC Operating Specifications and Conditions (Continued)
Not all speed grades listed may be supported for this device; refer to the title page for speeds supported; Notes: 1–5 apply to the entire table;
V_DDQ = 1.8V ±0.1V, V_DD = 1.8V ±0.1V
AC Characteristics
-187E
-25E
-25
-3E
-3
-37E
-5E
Parameter
Symbol Min Max Min Max Min Max Min Max Min Max Min Max Min Max Units Notes
Internal READ-to-
t_RTP
7.5
–
7.5 – 7.5 – 7.5 – 7.5 – 7.5 – 7.5 – ns 18, 37,
PRECHARGE delay
39
CAS#-to-CAS#
delay
t_CCD
2
–
2
–
2
–
2
–
2
–
2
–
2
– ^tCK 18
Write recovery
time
t_WR
15
–
15 – 15 – 15 – 15 – 15 – 15 – ns 18, 37
Write AP recovery ^tDAL ^tWR + – ^tWR + – ^tWR + – ^tWR + – ^tWR + – ^tWR + – ^tWR + –
ns
40
+ precharge time
t_RP
t_RP
t_RP
t_RP
t_RP
t_RP
t_RP
Internal WRITE-to- ^tWTR 7.5
–
7.5 – 7.5 – 7.5 – 7.5 – 7.5 – 10 – ns 18, 37
READ delay
LOAD MODE cycle ^tMRD
2
–
2
–
2
–
2
–
2
–
2
–
2
– ^tCK 18
time
REFRESH- 256Mb ^tRFC
75
–
75 – 75 – 75 – 75 – 75 – 75 –
to-
ACTIVATE
or to
-REFRESH
512Mb
1Gb
2Gb
105 – 105 – 105 – 105 – 105 – 105 – 105 –
127.5 – 127.5 – 127.5 – 127.5 – 127.5 – 127.5 – 127.5 –
195 – 195 – 195 – 195 – 195 – 195 – 195 –
interval
ns 18, 41
Average periodic
t_REFI
–
7.8
– 7.8 – 7.8 – 7.8 – 7.8 – 7.8 – 7.8 μs 18, 41
refresh
(commercial)
Average periodic
t_REFIIT
–
3.9
– 3.9 – 3.9 – 3.9 – 3.9 – 3.9 – 3.9 μs 18, 41
refresh
(industrial)
Average periodic
t_REFIAT
–
3.9
– 3.9 – 3.9 – 3.9 – 3.9 – 3.9 – 3.9 μs 18, 41
refresh
(automotive)
CKE LOW to CK,
CK# uncertainty
t_DELAY
MIN limit = ^tIS + ^tCK + ^tIH
MAX limit = n/a
ns
42