MT48V16M16LFFG Datasheet, PDF (28/58 Pages) Micron Technology – MOBILE SDRAM

ADVANCE
256Mb: x16
MOBILE SDRAM
TRUTH TABLE 2 – CKE
(Notes: 1-4)
CKE_n-1 CKE_n
L
L
L
H
H
L
H
H
CURRENT STATE
Power-Down
Self Refresh
Clock Suspend
Power-Down
Deep Power-Down
Self Refresh
Clock Suspend
All Banks Idle
All Banks Idle
All Banks Idle
Reading or Writing
COMMAND_n
X
X
X
COMMAND INHIBIT or NOP
X
COMMAND INHIBIT or NOP
X
COMMAND INHIBIT or NOP
DEEP POWER DOWN
AUTO REFRESH
VALID
See Truth Table 3
ACTION_n
Maintain Power-Down
Maintain Self Refresh
Maintain Clock Suspend
Exit Power-Down
Exit Deep Power-Down
Exit Self Refresh
Exit Clock Suspend
Power-Down Entry
Deep Power-Down Entry
Self Refresh Entry
Clock Suspend Entry
NOTES
5
8
6
7
8
NOTE:
1. CKE_n is the logic state of CKE at clock edge n; CKE_n-1 was the state of CKE at the previous clock edge.
2. Current state is the state of the SDRAM immediately prior to clock edge n.
3. COMMAND_n is the command registered at clock edge n, and ACTION_n is a result of COMMAND_n.
4. All states and sequences not shown are illegal or reserved.
5. Exiting power-down at clock edge n will put the device in the all banks idle state in time for clock edge n + 1 (provided
that ^tCKS is met).
6. Exiting self refresh at clock edge n will put the device in the all banks idle state once ^tXSR is met. COMMAND INHIBIT
or NOP commands should be issued on any clock edges occurring during the ^tXSR period. A minimum of two NOP
commands must be provided during ^tXSR period.
7. After exiting clock suspend at clock edge n, the device will resume operation and recognize the next command at clock
edge n + 1.
8. Deep Power-Down is a power savings feature of this Mobile SDRAM device. This command is Burst Terminate on
traditional SDRAM components. For Bat Ram devices, this command sequence is assigned to Deep Power Down.
256Mb: x16 Mobile SDRAM
MobileRamY26L_A.p65 – Pub. 5/02
28
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©2002, Micron Technology, Inc.