MT28F008B3 Datasheet, PDF (25/30 Pages) Micron Technology – FLASH MEMORY

8Mb
SMART 3 BOOT BLOCK FLASH MEMORY
V_IH
A0–A18/(A19)
V_IL
V_IH
CE#
V_IL
V_IH
OE#
V_IL
V_IH
WE# _VIL
DQ0–DQ7/ ^VIH
DQ0–DQ15 ² _VIL
V_HH
V_IH
RP# ³
V_IL
V_IH
WP# ³ _VIL
V_PPH2
V_PPH1
VPP
V_IL
WRITE/ERASE CYCLE
WE#-CONTROLLED WRITE/ERASE
Note 1
tAS
tAH
AIN
tAS
tAH
tCS
tWP
tDS
tRS
tCH
tWC
tWPH
tWED1/2/3/4
CMD
in
tWB
tDH
tDH
tDS
CMD/
Data-in
tRHS
[Unlock boot block]
Status
(SR7=0)
Status
(SR7=1)
tRHH
[Unlock boot block]
tVPS1
tVPS2
[5V VPP]
[3.3V VPP]
tVPH
WRITE SETUP or
ERASE SETUP input
WRITE or ERASE (block)
address asserted, and
WRITE data or ERASE
CONFIRM issued
WRITE or ERASE
executed, status register
checked for completion
TIMING PARAMETERS
Commercial Temperature (0ºC ≤ T_A ≤ +70ºC)
Extended Temperature (-40ºC ≤ T_A ≤ +85ºC)
SYMBOL
t_WC
t_WPH
t_WP
t_AS
t_AH
t_DS
t_DH
t_CS
t_CH
t_VPS1
-9/-9 ET
MIN MAX
90
20
50
50
0
50
0
0
0
200
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SYMBOL
t_VPS2
t_RS
t_RHS
t_WED1
t_WED2
t_WED3
t_WED4
t_WB
t_VPH
t_RHH
CMD
in
Command for next
operation issued
DON’T CARE
-9/-9 ET
MIN MAX
100
1,000
100
2
100
100
500
200
0
0
UNITS
ns
ns
ns
µs
ms
ms
ms
ns
ns
ns
NOTE: 1. Address inputs are “Don’t Care” but must be held stable.
2. If BYTE# is LOW, data and command are 8-bit. If BYTE# is HIGH, data is 16-bit and command is 8-bit.
3. Either RP# at VHH or WP# HIGH unlocks the boot block.
8Mb Smart 3 Boot Block Flash Memory
Q10_3.p65 – Rev. 3, Pub. 10/01
25
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©2001, Micron Technology, Inc.