MT48LC32M16A2P-75ITC Datasheet, PDF (23/77 Pages) Micron Technology – SDR SDRAM MT48LC128M4A2 – 32 Meg x 4 x 4 banks MT48LC64M8A2 – 16 Meg x 8 x 4 banks MT48LC32M16A2 – 8 Meg x 16 x 4 banks

512Mb: x4, x8, x16 SDRAM
Commands
NO OPERATION (NOP)
The NO OPERATION (NOP) command is used to perform a NOP to the selected device
(CS# is LOW). This prevents unwanted commands from being registered during idle or
wait states. Operations already in progress are not affected.
LOAD MODE REGISTER (LMR)
The mode registers are loaded via inputs A[n:0] (where An is the most significant ad-
dress term), BA0, and BA1(see Mode Register (page 35)). The LOAD MODE REGISTER
command can only be issued when all banks are idle and a subsequent executable com-
mand cannot be issued until ^tMRD is met.
ACTIVE
The ACTIVE command is used to activate a row in a particular bank for a subsequent
access. The value on the BA0, BA1 inputs selects the bank, and the address provided se-
lects the row. This row remains active for accesses until a PRECHARGE command is is-
sued to that bank. A PRECHARGE command must be issued before opening a different
row in the same bank.
Figure 7: ACTIVE Command
CLK
CKE HIGH
CS#
RAS#
CAS#
WE#
Address
Row address
BA0, BA1
Bank address
Don’t Care
PDF: 09005aef809bf8f3
512Mb_sdr.pdf - Rev. Q 12/12 EN
23
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