MT47H128M16RT-25EIT Datasheet, PDF (13/134 Pages) Micron Technology – 2Gb: x4, x8, x16 DDR2 SDRAM Features

Figure 5: Functional Block Diagram – 128 Meg x 16
2Gb: x4, x8, x16 DDR2 SDRAM
Functional Block Diagrams
ODT
CKE
CK
CK#
CS#
RAS#
CAS#
WE#
Control
logic
Mode
registers
16
A[13:0],
BA[2:0]
16 ^Address
register
Refresh ₁₄
counter
14
3
10
14
Row-
address
MUX
Bank 7
Bank 7
Bank 6
Bank 6
Bank 5
Bank 5
Bank 4
Bank 4
Bank 3
Bank 3
Bank 2
Bank 2
Bank 1
Bank 1
Bank 0
Bank 0
row-
address
latch
16,384
Memory array
(16,384 x 256 x 64)
and
decoder
Sense amplifier
16,384
64
2
Bank
control
logic
I/O gating
DM mask logic
256
(x64)
COL0, COL1
CK, CK#
64 Read
latch
16
16
16
16
16 ^{MUX DATA}
DLL
DRVRS
DQS
4
generator _{UDQS, UDQS#}
Input ^{LDQS, LDQS#}
registers
2
2
2
WRITE ⁸ ₂
FIFO
64 ^and
Mask ₂
drivers
16
2
2
2
2
RCVRS
16
Column- 8
address
counter/
2
latch
Column
decoder
CK, CK#
CK out
CK in
64 ¹⁶
Data ¹⁶
16
COL0, COL1
16 ₁₆
16
16
4
ODT control V_DDQ
sw1 sw2 sw3
sw1 sw2 sw3
R1 R2 R3
R1 R2 R3
DQ[15:0]
sw1 sw2 sw3
R1 R2 R3
R1 R2 R3
UDQS, UDQS#
LDQS, LDQS#
sw1 sw2 sw3
R1 R2 R3
R1 R2 R3
UDM, LDM
V_SSQ
PDF: 09005aef824f87b6
2Gb_DDR2.pdf – Rev. H 10/11 EN
13
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