MT29F8G08DAAWCA Datasheet, PDF (12/81 Pages) Micron Technology – 4Gb, 8Gb, and 16Gb x8 NAND Flash Memory

4Gb, 8Gb, and 16Gb x8 NAND Flash Memory
Addressing
Addressing
NAND Flash devices do not contain dedicated address pins. Addresses are loaded using
a 5-cycle sequence as shown in Tables 3 and 4, on pages 13 and 14. See Figure 5 for addi-
tional memory mapping and addressing details.
Memory Mapping
Figure 5: Memory Map
Blocks
4Gb, 8Gb 2 CE#: BA[17:6] 0
1
2 _{• • • • • • • • • • • •} 4,095
8Gb 1 CE#, 16Gb: BA[18:6]
8Gb 2 CE#: 4,096 blocks per CE#
8Gb 1 CE#: 8,192 blocks per CE#
16Gb: 8,192 blocks per CE#
Pages 0
1
2 _{• • •} 63
PA[5:0]
Bytes 0 1 2 _{• • • • • • • • • • • • • • • • • • •} 2,047 • • • 2,111
CA[11:0]
Spare area
Table 2:
Block
0
0
0
…
4,095
4,095
Operational Example
Page
0
1
2
…
62
63
Min Address in Page
0x0000000000
0x0000010000
0x0000020000
…
0x03FFFE0000
0x03FFFF0000
Max Address in Page
0x000000083F
0x000001083F
0x000002083F
…
0x03FFFE083F
0x03FFFF083F
Out of Bounds Addresses in Page
0x0000000840–0x0000000FFF
0x0000010840–0x0000010FFF
0x0000020840–0x0000020FFF
0x03FFFE0840–0x03FFFE0FFF
0x03FFFF0840–0x03FFFF0FFF
Notes:
1. As shown in Table 3 on page 13, the high nibble of ADDRESS cycle 2 has no assigned
address bits; however, these 4 bits must be held LOW during the ADDRESS cycle to ensure
that the address is interpreted correctly by the NAND Flash device. These extra bits are
accounted for in ADDRESS cycle 2 even though they do not have address bits assigned to
them.
2. The 12-bit column address is capable of addressing from 0 to 4,095 bytes on a x8 device;
however, only bytes 0 through 2,111 are valid. Bytes 2,112 through 4,095 of each page are
“out of bounds,” do not exist in the device, and cannot be addressed.
PDF: 09005aef81b80e13/Source: 09005aef81b80eac
4gb_nand_m40a__2.fm - Rev. B 2/07 EN
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