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MT48H8M16LF Datasheet, PDF (1/64 Pages) Micron Technology – Synchronous DRAM
Synchronous DRAM
MT48H8M16LF - 2 Meg x 16 x 4 banks
128Mb: x16 – Mobile SDRAM
Features
Features
• Temperature compensated self refresh (TCSR)
• Fully synchronous; all signals registered on positive
edge of system clock
• Internal pipelined operation; column address can
be changed every clock cycle
• Internal banks for hiding row access/precharge
• Programmable burst lengths: 1, 2, 4, 8, or full page
• Auto precharge, includes concurrent auto
precharge, and auto refresh modes
• Self refresh mode; standard and low power
• 64ms, 4,096-cycle refresh
• LVTTL-compatible inputs and outputs
• Low voltage power supply
• Partial array self refresh power-saving mode
• Deep power-down mode
• Programmable output drive strength
• Operating temperature ranges:
Extended (-25°C to +85°C)
Industrial (-40°C to +85°C)
Options
Marking
• VDD/VDDQ
1.8V/1.8V
H
• Configurations
8 Meg x 16 (2 Meg x 16 x 4 banks)
8M16
• Package/Ball out
54-ball FBGA, 8mm x 8mm (standard)
F4
54-ball FBGA, 8mm x 8mm (lead-free)
B4
• Timing (Cycle Time)
8ns @ CL = 3 (125 MHz)
-8
9.6ns @ CL = 3 (104 MHz)
-10
• Operating Temperature
Extended (-25°C to +85°C)
Industrial (-40°C to +85°C)
none
IT
FBGA Part Number System
Due to space limitations, FBGA-packaged components
have an abbreviated part marking that is different from
the part number. For a quick conversion of an FBGA
code, see the FBGA Part Marking Decoder on the
Micron Web site, www.micron.com/decoder.
Figure 1: 54-Ball FBGA Assignment
(Top View)
1
2
3
4
5
6
7
8
9
A
VSS
DQ15 VSSQ
VDDQ DQ0
VDD
B
DQ14 DQ13 VDDQ
VSSQ
DQ2
DQ1
C
DQ12 DQ11 VSSQ
VDDQ DQ4
DQ3
D
DQ10 DQ9 VDDQ
VSSQ
DQ6
DQ5
E
DQ8
NC
VSS
VDD LDQM DQ7
F
UDQM CLK
CKE
CAS# RAS#
WE#
G NC/A12 A11
A9
BA0
BA1
CS#
H
A8
A7
A6
A0
A1
A10
J
VSS
A5
A4
Top View
(Ball Down)
A3
A2
VDD
Table 1: Address Table
Configuration
Refresh Count
Row Addressing
Bank Addressing
Column Addressing
8 Meg x 16
2 Meg x 16 x 4 banks
4K
4K (A0–A11)
4 (BA0, BA1)
512 (A0–A8)
Table 2: Key Timing Parameters
CL = CAS (READ) latency
Speed
Grade
-8
-10
-8
-10
Clock
Frequency
125 MHz
104 MHz
104 MHz
83 MHz
Access Time
Setup Hold
CL = 2 CL = 3 Time Time
6ns 2.5ns 1ns
–
7ns 2.5ns 1ns
8ns
–
2.5ns 1ns
8ns
–
2.5ns 1ns
PDF: 09005aef80c97087/Source: 09005aef80c97015
MT48H8M16_1.fm - Rev. E 3/05 EN
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2003 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.