HCS361_11 Datasheet, PDF (9/42 Pages) Microchip Technology – KEELOQ® Code Hopping Encoder incorporates high security,

HCS361
3.5.10 SEED: ENABLE SEED
TRANSMISSION
If SEED = 0, seed transmission is disabled. The Inde-
pendent Counter mode can only be used with seed
transmission disabled since SEED_2 is shared with the
second synchronization counter.
With SEED = 1, seed transmission is enabled. The
appropriate button code(s) must be activated to trans-
mit the seed information. In this mode, the seed infor-
FIGURE 3-3:
Seed Transmission
All examples shown with XSER = 1, SEED = 1
When S[3:0] = 1001, delay is not applicable.
CRC+VLOW SER_1
SEED_2
For S[3:0] = 0x3 before delay:
mation (SEED_0, SEED_1, and SEED_2) and the
upper 12 or 16 bits of the serial number (SER_1)are
transmitted instead of the hop code.
Seed transmission is available for function codes
(Table 3-2) S[3:0] = 1001 and S[3:0] = 0011 (delayed).
This takes place regardless of the setting of the IND bit.
The two seed transmissions are shown in Figure 3-3.
SEED_1
SEED_0
Data transmission direction
16-bit Data Word
16-bit Counter
Encrypt
CRC+VLOW SER_1
SER_0
Encrypted Data
Data transmission direction
For S[3:0] = 0011 after delay (Note 1, Note 2):
CRC+VLOW SER_1
SEED_2
SEED_1
SEED_0
Data transmission direction
Note 1: For Seed Transmission, SEED_2 is transmitted instead of SER_0.
2: For Seed Transmission, the setting of DELM has no effect.
3.5.11
TMPSD: TEMPORARY SEED
TRANSMISSION
The temporary seed transmission can be used to dis-
able learning after the transmitter has been used for a
programmable number of operations. This feature can
be used to implement very secure systems. After learn-
ing is disabled, the seed information cannot be
accessed even if physical access to the transmitter is
possible. If TMPSD = 1 the seed transmission will be
disabled after a number of code hopping transmis-
sions. The number of transmissions before seed trans-
mission is disabled, can be programmed by setting the
synchronization counter (SYNC_A or SYNC_B) to a
value as shown in Table 3-4.
TABLE 3-4: SYNCHRONOUS COUNTER
INITIALIZATION VALUES
Synchronous Counter
Values
Number of
Transmissions
0000H
128
0060H
64
0050H
32
0048H
16
© 2011 Microchip Technology Inc.
DS40146F-page 9