HCS361_11 Datasheet, PDF (7/42 Pages) Microchip Technology – KEELOQ® Code Hopping Encoder incorporates high security,

3.5 CONFIG
(Configuration Word)
The Configuration Word is a 16-bit word stored in
EEPROM array that is used by the device to store
information used during the encryption process, as well
as the status of option configurations. Further
explanations of each of the bits are described in the
following sections.
TABLE 3-1: CONFIGURATION WORD
Bit Number Symbol
Bit Description
0
BACW Blank Alternate Code Word
1
BSEL
Baud Rate Selection
2
TXWAK PWM mode: 1/6, 2/6 or 1/3,
2/3 select
VPWM mode: Wake-up
enable
3
SPM
Sync Pulse Modulation
4
SEED Seed Transmission enable
5
DELM
Delay mode enable
6
TIMO
Time-out enable
7
IND Independent mode enable
8
USRA0
User bit
9
USRA1
User bit
10
USRB0
User bit
11
USRB1
User bit
12
XSER Extended serial number
enable
13
TMPSD
Temporary seed
transmission enable
14
MOD Modulation format select
15
OVR
Overflow bit
3.5.1 MOD: MODULATION FORMAT
MOD selects between VPWM modulation and PWM
modulation format.
If MOD = 1, VPWM modulation is selected as well as
the following:
1. Enables the TXWAK bit to select the WAKE-UP
transmission.
2. Extends the Guard Time.
If MOD = 0, PWM modulation is selected.
3.5.2 BSEL: BAUD RATE SELECT
BSEL selects the baud rate. If BSEL = 1, the baud rate
is nominally 1667 bits per second and with BSEL = 0,
833 bits per second.
3.5.3
TXWAK: BIT FORMAT SELECT OR
WAKE-UP
In PWM mode, this bit selects the bit format.
If TXWAK = 0, the PWM pulse duty cycle is 1/3-2/3.
If TXWAK = 1, the PWM pulse duty cycle is 1/6-2/6.
© 2011 Microchip Technology Inc.
HCS361
In VPWM mode, this bit enables the wake-up signal.
If TXWAK = 0, transmissions start normally with the
preamble portion of the code word.
If TXWAK = 1, transmissions start with a Wake-up
sequence followed by a dead time (see Figure 4-2).
Note:
The Wake-up sequence is transmitted
before the first code word of each trans-
mission only.
The following tables summarize the combined effect of
TXWAK, BSEL and MOD option bits.
TABLE 3-1: PWM OPTIONS
MOD TXWAK
0
0
0
0
0
1
0
1
BSEL
0
1
0
1
TE
400us
200us
200us
100us
Duty Cycle
1/3-2/3
1/3-2/3
1/6-2/6
1/6-2/6
TABLE 3-2: VPWM OPTIONS
MOD TXWAK
1
0
1
0
1
1
1
1
BSEL
0
1
0
1
TE
400us
200us
400us
200us
Wake-up
NO
NO
YES
YES
3.5.4 SPM: SYNC PULSE MODULATION
Select Modulation mode of Sync Pulse. If SPM = 1, the
sync pulse is modulated (Figure 4-1 and Figure 4-2).
3.5.5 OVR: OVERFLOW
The overflow bit is used to extend the number of possi-
ble synchronization values. The synchronization coun-
ter is 16 bits in length, yielding 65,536 values before the
cycle repeats. Under typical use of 10 operations a day,
this will provide nearly 18 years of use before a
repeated value will be used. Should the system
designer conclude that is not adequate, then the over-
flow bit can be utilized to extend the number of unique
values. This can be done by programming OVR to 1 at
the time of production. The encoder will automatically
clear OVR the first time that the transmitted synchroni-
zation value wraps from 0xFFFF to 0x0000. Once
cleared, OVR cannot be set again, thereby creating a
permanent record of the counter overflow. This pre-
vents fast cycling of 64K counter. If the decoder system
is programmed to track the overflow bits, then the effec-
tive number of unique synchronization values can be
extended to 128K. If programmed to zero, the system
will be compatible with old encoder devices.
DS40146F-page 7