PIC16F722A Datasheet, PDF (83/284 Pages) Microchip Technology – 28-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC16F/LF722A/723A
8.0 DEVICE CONFIGURATION
Device configuration consists of Configuration Word 1
and Configuration Word 2 registers, code protection
and device ID.
8.1 Configuration Words
There are several Configuration Word bits that allow
different oscillator and memory protection options.
These are implemented as Configuration Word 1
register at 2007h and Configuration Word 2 register at
2008h. These registers are only accessible during
programming.
REGISTER 8-1:
—
bit 15
CONFIG1: CONFIGURATION WORD REGISTER 1
R/P-1
R/P-1
U-1⁽⁴⁾
R/P-1
—
DEBUG
PLLEN
—
BORV
R/P-1
BOREN1
R/P-1
BOREN0
bit 8
U-1⁽⁴⁾
—
bit 7
R/P-1
CP
R/P-1
MCLRE
R/P-1
PWRTE
R/P-1
WDTE
R/P-1
FOSC2
R/P-1
FOSC1
R/P-1
FOSC0
bit 0
Legend:
R = Readable bit
-n = Value at POR
P = Programmable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 13
bit 12
bit 11
bit 10
bit 9-8
bit 7
bit 6
bit 5
bit 4
bit 3
DEBUG: In-Circuit Debugger Mode bit
1 = In-circuit debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins
0 = In-circuit debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger
PLLEN: INTOSC PLL Enable bit
0 = INTOSC frequency is 500 kHz
1 = INTOSC frequency is 16 MHz (32x)
Unimplemented: Read as ‘1’
BORV: Brown-out Reset Voltage selection bit
0 = Brown-out Reset Voltage (VBOR) set to 2.5 V nominal
1 = Brown-out Reset Voltage (VBOR) set to 1.9 V nominal
BOREN<1:0>: Brown-out Reset Selection bits⁽¹⁾
0x = BOR disabled (preconditioned state)
10 = BOR enabled during operation and disabled in Sleep
11 = BOR enabled
Unimplemented: Read as ‘1’
CP: Code Protection bit⁽²⁾
1 = Program memory code protection is disabled
0 = Program memory code protection is enabled
MCLRE: RE3/MCLR Pin Function Select bit⁽³⁾
1 = RE3/MCLR pin function is MCLR
0 = RE3/MCLR pin function is digital input, MCLR internally tied to VDD
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
Note 1:
2:
3:
4:
Enabling Brown-out Reset does not automatically enable Power-up Timer.
The entire program memory will be erased when the code protection is turned off.
When MCLR is asserted in INTOSC or RC mode, the internal clock oscillator is disabled.
MPLAB^® IDE masks unimplemented Configuration bits to ‘0’.
 2010 Microchip Technology Inc.
DS41417A-page 83