PIC16F722A Datasheet, PDF (223/284 Pages) Microchip Technology – 28-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC16F/LF722A/723A
TABLE 23-11: SPI MODE REQUIREMENTS
Param
No.
Symbol
Characteristic
Min. Typ† Max. Units Conditions
SP70* TSSL2SCH, SS to SCK or SCK input
TSSL2SCL
TCY
— — ns
SP71* TSCH
SCK input high time (Slave mode)
TCY + 20 — — ns
SP72* TSCL
SCK input low time (Slave mode)
TCY + 20 — — ns
SP73* TDIV2SCH, Setup time of SDI data input to SCK edge
TDIV2SCL
100
— — ns
SP74* TSCH2DIL, Hold time of SDI data input to SCK edge
TSCL2DIL
100
— — ns
SP75* TDOR
SDO data output rise time
3.0-5.5V
—
10 25 ns
1.8-5.5V
—
25 50 ns
SP76* TDOF
SDO data output fall time
—
10 25 ns
SP77* TSSH2DOZ SS to SDO output high-impedance
10
— 50 ns
SP78* TSCR
SCK output rise time
(Master mode)
3.0-5.5V
1.8-5.5V
—
10 25 ns
—
25 50 ns
SP79* TSCF
SCK output fall time (Master mode)
—
10 25 ns
SP80* TSCH2DOV, SDO data output valid after
TSCL2DOV SCK edge
3.0-5.5V
1.8-5.5V
—
— 50 ns
—
— 145 ns
SP81* TDOV2SCH, SDO data output setup to SCK edge
TDOV2SCL
Tcy
— — ns
SP82* TSSL2DOV SDO data output valid after SS edge
—
— 50 ns
SP83* TSCH2SSH, SS after SCK edge
TSCL2SSH
1.5TCY + 40 — — ns
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
FIGURE 23-20: I²C™ BUS START/STOP BITS TIMING
SCL
SDA
SP90
SP91
SP92
SP93
Start
Condition
Note: Refer to Figure 23-2 for load conditions.
Stop
Condition
 2010 Microchip Technology Inc.
DS41417A-page 223