DSPIC30F5015_07 Datasheet, PDF (81/230 Pages) Microchip Technology – High-Performance, 16-Bit Digital Signal Controllers

dsPIC30F5015/5016
12.0 INPUT CAPTURE MODULE
Note: This data sheet summarizes features of this
group of dsPIC30F devices and is not intended to be
a complete reference source. For more information
on the CPU, peripherals, register descriptions and
general device functionality, refer to the “dsPIC30F
Family Reference Manual” (DS70046).
This section describes the input capture module and
associated operational modes. The features provided by
this module are useful in applications requiring
frequency (period) and pulse measurement. Figure 12-1
depicts a block diagram of the input capture module.
Input capture is useful for such modes as:
• Frequency/Period/Pulse Measurements
• Additional sources of External Interrupts
The key operational features of the input capture
module are:
• Simple Capture Event mode
• Timer2 and Timer3 mode selection
• Interrupt on input capture event
These operating modes are determined by setting the
appropriate bits in the ICxCON register (where
x = 1,2,...,N). The dsPIC30F5015/5016 device has 8
capture channels.
12.1 Simple Capture Event Mode
The simple capture events in the dsPIC30F product
family are:
• Capture every falling edge
• Capture every rising edge
• Capture every 4th rising edge
• Capture every 16th rising edge
• Capture every rising and falling edge
These simple Input Capture modes are configured by
setting the appropriate bits ICM<2:0> (ICxCON<2:0>).
12.1.1 CAPTURE PRESCALER
There are four input capture prescaler settings, speci-
fied by bits ICM<2:0> (ICxCON<2:0>). Whenever the
capture channel is turned off, the prescaler counter will
be cleared. In addition, any Reset will clear the
prescaler counter.
FIGURE 12-1:
INPUT CAPTURE MODE BLOCK DIAGRAM
From General Purpose Timer Module T2_CNT
T3_CNT
ICx
Pin
Prescaler
1, 4, 16
Clock
Synchronizer
3
ICM<2:0>
Mode Select
ICBNE, ICOV
Edge
Detection
Logic
FIFO
R/W
Logic
ICxCON
ICI<1:0>
Interrupt
Logic
16 16
ICTMR
10
ICxBUF
Note:
Data Bus
Set Flag
ICxIF
Where ‘x’ is shown, reference is made to the registers or bits associated to the respective input
capture channels 1 through N.
© 2007 Microchip Technology Inc.
DS70149C-page 79