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MCP19124 Datasheet, PDF (67/236 Pages) Microchip Technology – Digitally-Enhanced Power Analog Synchronous Low-Side Dual-Loop PWM Controller | |||
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MCP19124/5
9.11 Calibration Word 11
Calibration word 11 at memory location 208Ah contains
the calibration bits for the 4V LDO (AVDD) trim
AVDDCAL<3:0> and the offset voltage of the analog
test buffer BUFF<7:0>. AVDD supplies the internal
analog circuitry and is the default ADC Reference
voltage. Firmware must read these values and copy
into the AVDDCAL Special Function Register located in
Bank 3 at 19Dh.
Also stored at address 208Ah is the Analog test MUX
buffer offset value. This is an 8 bit, 2âs complement
word that represents the bufferâs offset voltage in units
of mV. This value can be used to correct for buffer offset
of the analog test signal measurements. See
Section 8.0 âSystem Bench Testingâ for test signal
details.
REGISTER 9-11: CALWD11: CALIBRATION WORD 11 REGISTER
U-0
â
bit 13
U-0
R/P-1
R/P-1
R/P-1
R/P-1
â
AVDDCAL3 AVDDCAL2 AVDDCAL1 AVDDCAL0
bit 8
R/P-1
BUFF7
bit 7
R/P-1
BUFF6
R/P-1
BUFF5
R/P-1
BUFF4
R/P-1
BUFF3
R/P-1
BUFF2
R/P-1
BUFF1
R/P-1
BUFF0
bit 0
Legend:
R = Readable bit
-n = Value at POR
P = Programmable bit
â1â = Bit is set
U = Unimplemented bit, read as â0â
â0â = Bit is cleared
x = Bit is unknown
bit 13-12
bit 11-8
bit 7-0
Unimplemented: Read as â0â
AVDDCAL<3:0>: AVDD 4V LDO Trim bits
BUFF<7:0>: Analog Test Mux Buffer Offset bits
11111111 = Mid scale (-1 mV)
â¢
â¢
10000000 = Largest negative offset (-128 mV)
01111111 = Largest positive offset (+128 mV)
â¢
â¢
00000000 = Mid scale (0 mV)
ï£ 2016 Microchip Technology Inc.
DS20005619A-page 67
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