MCP19124 Datasheet, PDF (109/236 Pages) Microchip Technology – Digitally-Enhanced Power Analog Synchronous Low-Side Dual-Loop PWM Controller

MCP19124/5
REGISTER 17-1: PORTGPA: PORTGPA REGISTER
R/W-x
GPA7
bit 7
R/W-x
GPA6
R-x
GPA5
U-0
R/W-x
—
GPA3
R/W-x
GPA2
R/W-x
GPA1
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-0
GPA7: General-Purpose Open-Drain I/O pin
1 = Port pin is > V_IH
0 = Port pin is < V_IL
GPA6: General-Purpose I/O pin
1 = Port pin is > V_IH
0 = Port pin is < V_IL
GPA5/MCLR/TEST_EN5: General-Purpose Open-Drain input pin
Unimplemented: Read as ‘0’
GPA<3:0>: General-Purpose I/O pin
1 = Port pin is > V_IH
0 = Port pin is < V_IL
REGISTER 17-2: TRISGPA: PORTGPA TRI-STATE REGISTER
R/W-1
TRISA7
bit 7
R/W-1
TRISA6
R-1
TRISA5
U-0
R/W-1
R/W-1
—
TRISA3
TRISA2
R/W-1
TRISA1
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n = Value at POR
bit 7-6
bit 5
bit 4
bit 3-0
TRISA<7:6>: PORTGPA Tri-State Control bits
1 = PORTGPA pin configured as an input (tri-stated)
0 = PORTGPA pin configured as an output
TRISA5: GPA5 Port Tri-State Control bit
This bit is always ‘1’ as GPA5 is an input only
Unimplemented: Read as ‘0’
TRISA<3:0>: PORTGPA Tri-State Control bits
1 = PORTGPA pin configured as an input (tri-stated)
0 = PORTGPA pin configured as an output
R/W-x
GPA0
bit 0
R/W-1
TRISA0
bit 0
 2016 Microchip Technology Inc.
DS20005619A-page 109