MCP19124 Datasheet, PDF (184/236 Pages) Microchip Technology – Digitally-Enhanced Power Analog Synchronous Low-Side Dual-Loop PWM Controller

FIGURE 28-21: I²C MASTER MODE WAVEFORM (RECEPTION, 7-BIT ADDRESS)
Write to SSPCON2<4> to start Acknowledge
sequence SDA = ACKDT (SSPCON2<5>) = 0
Write to SSPCON2<0> (SEN = 1),
begin Start condition
Master configured as a receiver
SEN = 0
by programming SSPCON2<3> (RCEN = 1)
Write to SSPBUF
RCEN cleared
occurs here, start XMIT ACK from Slave
automatically
ACK from Master
SDA = ACKDT = 0
RCEN = 1, start
next receive
Set ACKEN, start Acknowledge sequence
SDA = ACKDT = 1
RCEN cleared
automatically ^{PEN bit = 1 written here}
Receiving Data from Slave
Receiving Data from Slave
SDA
A7 A6 A5 A4 A3 A2 A1 R/W ACK D7 D6 D5 D4 D3 D2 D1 D0
ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK
Bus master
ACK is not sent ^terminates
transfer
SCL
S
1 2345 6 789
1 23 456 78
Set SSPIF interrupt
at end of receive
9
12 34 567 8
Data shifted in on falling edge of CLK
Set SSPIF interrupt
9
Set SSPIF
at end of receive
P _{Set SSPIF interrupt}
at end of
Acknowledge
at end of Acknowledge
sequence
SSPIF
sequence
SDA = 0, SCLx = 1
while CPU
responds to SSPxIR
Cleared by software
Cleared by software
Cleared by software
Cleared by software
Cleared by
software
Set P bit
(SSPSTAT4)
and SSPIF
BF
(SSPSTAT0)
Last bit is shifted into SSPSR and
contents are unloaded into SSPBUF
SSPOV
ACKEN
SSPOV is set because
SSPBUF is still full
RCEN
Master configured as a receiver
RCEN cleared ^{ACK from Master}
by programming SSPCON2<3> (RCEN = 1) automatically SDA = ACKDT = 0
RCEN cleared
automatically