SIO1007 Datasheet, PDF (66/108 Pages) Microchip Technology – LPC Super I/O LPC IrDA Hot Docking Chip with UART

SIO1007
TABLE 18-13: CR10 (CONTINUED)
Test 2
Type: R/W
Default: 0X00 ON VCC POR
BIT NO.
4
5
6
7
BIT NAME
Test 12
Test 13
Test 14
Test 15
DESCRIPTION
18.4.18 CR11
CR11 can only be accessed in the configuration state and after the CSR has been initialized to 11H. CR11 is a test con-
trol register and all bits must be treated as Reserved.
Note: All test modes are reserved for Microchip use. Activating test mode registers may produce undesired
results.
TABLE 18-14: CR11
Type: R/W
BIT NO.
0
BIT NAME
Test 16
Test 3
Default: 0X00 ON VCC POR
DESCRIPTION
RESERVED FOR MICROCHIP USE
1
Test 17
2
Test 18
3
Test 19
4
Test 20
5
Test 21
6
Test 22
7
Test 23
18.4.19 CR12 - CR13
CR12 and CR13 are the SIO1007 Configuration Ports base address registers (Table 18-15 and Table 18-16). These
registers are used to relocate the Configuration Ports base address beyond the power-up defaults determined by the
SYSOPT[1:0] pin strap options.
CR12 contains the Configuration Ports base address bits A[7:0]. CR13 contains the Configuration Ports base address
bits A[15:8].
The Configuration Ports base address is relocatable on even-byte boundaries; i.e., A0 = ‘0’.
At power-up the Configuration Ports base address is determined by the SYSOPT[1:0] pin strap options. To relocate the
Configuration Ports base address after power-up, first write the lower address bits of the new base address to CR12
and then write the upper address bits to CR13.
Note: Writing CR13 changes the Configuration Ports base address.
DS00002020A-page 66
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