SIO1007 Datasheet, PDF (57/108 Pages) Microchip Technology – LPC Super I/O LPC IrDA Hot Docking Chip with UART

SIO1007
18.0 CONFIGURATION
The configuration of the SIO1007 is programmed through hardware selectable Configuration Access Ports that appear
when the chip is placed into the configuration state. The SIO1007 logical device blocks, if enabled, will operate normally
in the configuration state.
18.1 Configuration Access Ports
The Configuration Access Ports are the CONFIG PORT, the INDEX PORT, and the DATA PORT (Table 18-2). The base
address of these registers is controlled by the nRTS/SYSOPT0 and nDTS/SYSOPT1 pins and by the Configuration Port
Base Address registers CR12 and CR13. The configuration base address at power-up is determined by the SYSOPT
strap option. The SYSOPT strap option is latched state of the nRTS/SYSOPT0 and nDTS/SYSOPT1 pins at the deas-
serting edge of PCIRST#. The nRTS/SYSOPT0 pin determines the lower byte of the Base Address and the nDTS/SYS-
OPT1 pin determines the upper byte of the Base Address. See Table 18-1 Default Configuration Access Ports Base
Address Decoded from the SYSOPT Strap Option.
APPLICATION NOTE: The nRTS1/SYSOPT0 and the nDTS1/SYSOPT1 pins require external pullup/pull-down
resistors to set the default base I/O address for configuration to 0x002E, 0x004E, 0x162E,
or 0x164E.
TABLE 18-1:
SYSOPT1
0
0
1
1
DEFAULT CONFIGURATION ACCESS PORTS BASE ADDRESS DECODED FROM
THE SYSOPT STRAP OPTION
SYSOPT0
Default CONFIG Port/ Index Port Address
0
0x002E
1
0x004E
0
0x162E
1
0x164E
TABLE 18-2: CONFIGURATION ACCESS PORTS
Port Name
Relative Address
Type
CONFIG PORT
INDEX PORT
DATA PORT
Configuration Access Ports Base Address + 0
Configuration Access Ports Base Address + 0
Configuration Access Ports Base Address + 1
WRITE
READ/WRITE
(Note 18-1, Note 18-2)
READ/WRITE
(Note 18-2)
Note 18-1 The INDEX and DATA ports are active only when the SIO1007 is in the configuration state.
Note 18-2 The INDEX PORT is only readable in the configuration state.
18.2 Configuration State
The configuration registers are used to select programmable chip options. The SIO1007 operates in two possible states:
the run state and the configuration state. After power up by default the chip is in the run state. To program the config-
uration registers, the configuration state must be explicitly enabled. Programming the configuration registers typically
follows this sequence:
1. Enter the Configuration State,
2. Program the Configuration Register(s),
3. Exit the Configuration State.
18.2.1 ENTERING THE CONFIGURATION STATE
To enter the configuration state write the Configuration Access Key to the CONFIG PORT. The Configuration Access
Key is one byte of 55H data. The SIO1007 will automatically activate the Configuration Access Ports following this pro-
cedure.
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DS00002020A-page 57