DSPIC30F4011_10 Datasheet, PDF (56/238 Pages) Microchip Technology – High-Performance, 16-Bit Digital Signal Controllers

dsPIC30F4011/4012
7.2 Erasing Data EEPROM
7.2.1
ERASING A BLOCK OF DATA
EEPROM
In order to erase a block of data EEPROM, the
NVMADRU and NVMADR registers must initially
point to the block of memory to be erased. Configure
NVMCON for erasing a block of data EEPROM and
set the WR and WREN bits in the NVMCON register.
Setting the WR bit initiates the erase, as shown in
Example 7-2.
EXAMPLE 7-2: DATA EEPROM BLOCK ERASE
; Select data EEPROM block, WR, WREN bits
MOV
#0x4045,W0
MOV
W0_,NVMCON
; Initialize NVMCON SFR
; Start erase cycle by setting WR after writing key sequence
DISI #5
; Block all interrupts with priority < 7
; for next 5 instructions
MOV
#0x55,W0
;
MOV
W0_,NVMKEY
MOV
#0xAA,W1
; Write the 0x55 key
;
MOV
BSET
W1_,NVMKEY
NVMCON,#WR
; Write the 0xAA key
; Initiate erase sequence
NOP
NOP
; Erase cycle will complete in 2mS. CPU is not stalled for the Data Erase Cycle
; User can poll WR bit, use NVMIF or Timer IRQ to determine erasure complete
7.2.2
ERASING A WORD OF DATA
EEPROM
The TBLPAG and NVMADR registers must point to
the block. Select erase a block of data Flash and set
the WR and WREN bits in the NVMCON register.
Setting the WR bit initiates the erase, as shown in
Example 7-3.
EXAMPLE 7-3: DATA EEPROM WORD ERASE
; Select data EEPROM word, WR, WREN bits
MOV
#0x4044,W0
MOV
W0_,NVMCON
; Start erase cycle by setting WR after writing key sequence
DISI #5
; Block all interrupts with priority <7
; for next 5 instructions
MOV
#0x55,W0
;
MOV
W0_,NVMKEY
MOV
#0xAA,W1
; Write the 0x55 key
;
MOV
BSET
W1_,NVMKEY
NVMCON,#WR
; Write the 0xAA key
; Initiate erase sequence
NOP
NOP
; Erase cycle will complete in 2mS. CPU is not stalled for the Data Erase Cycle
; User can poll WR bit, use NVMIF or Timer IRQ to determine erasure complete
DS70135G-page 56
© 2010 Microchip Technology Inc.