DSPIC33FJ64GP204-I Datasheet, PDF (49/436 Pages) Microchip Technology – 16-bit Digital Signal Controllers (up to 128 KB Flash and 16K SRAM) with Advanced Analog

TABLE 4-13: ADC1 REGISTER MAP FOR dsPIC33FJ64GP202/802, dsPIC33FJ128GP202/802 AND dsPIC33FJ32GP302
File Name Addr Bit 15 Bit 14 Bit 13
Bit 12
Bit 11 Bit 10 Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
ADC1BUF0 0300
ADC Data Buffer 0
AD1CON1
0320 ADON
— ADSIDL ADDMABM —
AD12B
FORM<1:0>
SSRC<2:0>
AD1CON2
0322
VCFG<2:0>
—
— CSCNA
CHPS<1:0>
BUFS
—
AD1CON3
0324 ADRC
—
—
SAMC<4:0>
AD1CHS123 0326
—
—
—
—
—
CH123NB<1:0> CH123SB
—
—
—
AD1CHS0
0328 CH0NB —
—
CH0SB<4:0>
CH0NA
—
—
AD1PCFGL 032C
—
—
—
PCFG12 PCFG11 PCFG10 PCFG9
—
—
—
PCFG5
AD1CSSL
0330
—
—
—
CSS12 CSS11 CSS10 CSS9
—
—
—
CSS5
AD1CON4
0332
—
—
—
—
—
—
—
—
—
—
—
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
—
SIMSAM ASAM SAMP DONE
SMPI<3:0>
BUFM ALTS
ADCS<7:0>
—
—
CH123NA<1:0> CH123SA
CH0SA<4:0>
PCFG4 PCFG3 PCFG2 PCFG1 PCFG0
CSS4
CSS3 CSS2 CSS1
CSS0
—
—
DMABL<2:0>
xxxx
0000
0000
0000
0000
0000
0000
0000
0000
TABLE 4-14: ADC1 REGISTER MAP FOR dsPIC33FJ64GP204/804, dsPIC33FJ128GP204/804 AND dsPIC33FJ32GP304
File Name Addr Bit 15 Bit 14 Bit 13
Bit 12
Bit 11 Bit 10 Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
ADC1BUF0 0300
ADC Data Buffer 0
AD1CON1 0320 ADON
— ADSIDL ADDMABM —
AD12B
FORM<1:0>
SSRC<2:0>
AD1CON2 0322
VCFG<2:0>
—
— CSCNA
CHPS<1:0>
BUFS
—
AD1CON3 0324 ADRC
—
—
SAMC<4:0>
AD1CHS123 0326
—
—
—
—
—
CH123NB<1:0> CH123SB
—
—
—
AD1CHS0 0328 CH0NB —
—
CH0SB<4:0>
CH0NA
—
—
AD1PCFGL 032C
—
—
—
PCFG12 PCFG11 PCFG10 PCFG9 PCFG8 PCFG7 PCFG6 PCFG5
AD1CSSL
0330
—
—
—
CSS12 CSS11 CSS10 CSS9 CSS8
CSS7
CSS6 CSS5
AD1CON4 0332
—
—
—
—
—
—
—
—
—
—
—
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
—
SIMSAM ASAM SAMP DONE
SMPI<3:0>
BUFM ALTS
ADCS<7:0>
—
—
CH123NA<1:0> CH123SA
CH0SA<4:0>
PCFG4 PCFG3 PCFG2 PCFG1 PCFG0
CSS4
CSS3 CSS2 CSS1 CSS0
—
—
DMABL<2:0>
xxxx
0000
0000
0000
0000
0000
0000
0000
0000
TABLE 4-15: DAC1 REGISTER MAP FOR dsPIC33FJ128GP802/804 AND dsPIC33FJ64GP802/804
SFR Name
SFR
Addr
Bit 15
Bit 14
Bit 13 Bit 12 Bit 11 Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
DAC1CON 03F0 DACEN
— DACSIDL AMPON —
—
—
FORM
—
DACFDIV<6:0>
DAC1STAT 03F2 LOEN
— LMVOEN —
—
LITYPE LFULL LEMPTY ROEN
— RMVOEN —
—
RITYPE
DAC1DFLT 03F4
DAC1DFLT<15:0>
DAC1RDAT 03F6
DAC1RDAT<15:0>
DAC1LDAT 03F8
DAC1LDAT<15:0>
Legend: x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Bit 1
Bit 0
All
Resets
RFULL
REMPTY
0000
0000
0000
0000
0000