EVB-LAN9353 Datasheet, PDF (37/43 Pages) Microchip Technology – EVB-LAN9353 Evaluation Board User’s Guide

FIGURE B-8:
EVB-LAN9353 EVALUATION BOARD SCHEMATIC 8
Jumper settings for CONFIG 9 or CONFIG 10
SW11 SW12 SW13 SW14 SW15 SW16 SW17 SW18 Mode
Configuration
1-3 1-3 1-3 1-3 1-3 1-3 1-3 1-3
2 RMII
CONFIG 9
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1-2
1 MII/RMII/TMII
(Default)
CONFIG 10
Note: For Switches to short 1-3, Knob Position should be
at 1-2 and vice versa .
P0_DUPLEX
R118
3V3
J28 ₁
2
10.0K
3
Default (1-2)
P0_OUTER_SPEED
R119
10.0K
3V3
J29 ₁
2
3
Default (1-2)
SW11
P0_INCLK
2 JS102011CQN
1
P1_REFCLK_MODE0 3
SW12
P0_IND3
2
JS102011CQN
1
P1_IND1
3
SW13
P0_IND2
2 JS102011CQN
1
P1_IND0
3
SW14
P0_INER
2
JS102011CQN
1
P1_INDV
3
SW15
P0_OUTD3 2 JS102011CQN
1
P1_OUTD1_MODE2 3
SW16
P0_OUTD2
2
JS102011CQN
1
P1_OUTD0_MODE1
3
SW17
P0_CRS
2 JS102011CQN
1
P1_MDC_DUPLEX 3
SW18
P0_COL
2
JS102011CQN
1
P1_MDIO_SPEED
3
8 Jumpers
Config9(2RMII) = 2-3 Short (1-2 - open)
Config10 = 1-2 Short (2-3 - open) (Default)
P1_REFCLK_MODE0/P0_INCLK R117
P1_IND1/P0_IND3
R144
P1_IND0/P0_IND2
R145
P1_INDV/P0_INER
P1_OUTD1_MODE2/P0_OUTD3
R146
P1_OUTD0_MODE1/P0_OUTD2_MODE3R147
P1_OUTDV
1
P1_MDC_DUPLEX/P0_CRS
P1_MDIO_SPEED/P0_COL
33
33
33
33
33
2
J22
LAN9353
U4B
P0_REFCLK/P0_MODE0[P0_OUTCLK/P0_REFCLK/P0_MODE0]
29
31 ^{P1_REFCLK/P1_MODE0[P0_INCLK]}
30 ^{P1_IND1[P0_IND3]}
33 ^{P1_IND0[P0_IND2]}
P1_INDV[P0_INER]
P0_IND1
P0_IND0
P0_INDV
15
16 ^{P1_OUTD1/P1_MODE2[P0_OUTD3]}
35 ^{P1_OUTD0/P1_MODE1[P0_OUTD2/P0_MODE3]}
P1_OUTDV[RESERVED]
P0_OUTD1/P0_MODE2
P0_OUTD0/P0_MODE1
P0_OUTDV
49
50 ^{P1_DUPLEX/P1_MDC[P0_CRS]}
P1_SPEED/P1_MDIO[P0_COL]
P0_DUPLEX
P0_SPEED[P0_OUTER/P0_SPEED]
CONFIG9[CONFIG10]
P0_MDC
P0_MDIO
CONFIG9 = 2RMII
CONFIG10 = 1 MII/RMII(Default)
P1_MDC_DUPLEX/P0_CRS
R120
10.0K
3V3
J30 ₁
2
3
25 R116
33
P0_OUT/REF_CLK_MODE0
28 R122
27 R123
26
33 P0_IND1
33 P0_IND0
P0_INDV
21 R124
22 R125
23
33 P0_OUTD1_MODE2
33 P0_OUTD0_MODE1
P0_OUTDV
36
P0_DUPLEX
19
P0_OUTER_SPEED
39
P0_MDC
40
P0_MDIO
P1_MDIO_SPEED
P1_MDC_DUPLEX
P1_IND1
P1_IND0
P1_INDV
P1_REFCLK_MODE0
P1_OUTDV
P1_OUTD0_MODE1
P1_OUTD1_MODE2
P0_INER
P0_INCLK
P0_INDV
P0_IND0
P0_IND1
P0_IND2
P0_IND3
P0_COL
P0_CRS
Default -Open
P1_MDIO_SPEED/P0_COL
R121
10.0K
3V3
J31 ₁
2
3
Default -Open
P0_MDIO
P0_MDC
P0_OUTD3
P0_OUTD2
P0_OUTD1_MODE2
P0_OUTD0_MODE1
P0_OUTDV
P0_OUT/REF_CLK_MODE0
P0_OUTER_SPEED
P1_REFCLK_MODE0/P0_INCLK
P1_OUTD1_MODE2/P0_OUTD3
P1_OUTD0_MODE1/P0_OUTD2_MODE3
P0_OUTD1_MODE2
P0_OUTD0_MODE1
P0_OUT/REF_CLK_MODE0
Emulated Link Partner Default Advertised
Ability for Port 0
J28
(P0_DUPLEX)
1-2
1-2
2-3
2-3
J29
(P0_SPEED)
2-3
1-2
2-3
1-2
Duplex
Strap_0
1
1
0
0
Speed ADVERTISED LINK PARTNER ABILITY
Strap_0
(Bits 8,7,6,5)
0
10BASE-T full-duplex (0010)
1
100BASE-X full-duplex (1000) (Default)
0
10BASE-T half-duplex (0001)
1
100BASE-X half-duplex (0100)
Emulated Link Partner Default Advertised
Ability for Port 1
J30
(P1_DUPLEX)
1-2
1-2
2-3
2-3
J31
(P1_SPEED)
2-3
1-2
2-3
1-2
Duplex
Strap_1
1
1
0
0
Speed ADVERTISED LINK PARTNER ABILITY
Strap_1
(Bits 8,7,6,5)
0
10BASE-T full-duplex (0010)
1
100BASE-X full-duplex (1000)
0
10BASE-T half-duplex (0001)
1
100BASE-X half-duplex (0100)