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DSPIC33FJ16GS504T-E Datasheet, PDF (333/346 Pages) Microchip Technology – High-Performance, 16-bit Digital Signal Controllers | |||
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dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
TABLE A-1: MAJOR SECTION UPDATES (CONTINUED)
Section Name
Update Description
Section 16.0 âInter-Integrated
Circuit (I2Câ¢)â
Removed the following sections, which are now available in the related
section of the dsPIC33F Family Reference Manual:
⢠16.3 âI2C Interruptsâ
⢠16.4 âBaud Rate Generatorâ (retained Figure 16-1: I2C Block Diagram)
⢠16.5 âI2C Module Addresses
⢠16.6 âSlave Address Maskingâ
⢠16.7 âIPMI Supportâ
⢠16.8 âGeneral Call Address Supportâ
⢠16.9 âAutomatic Clock Stretchâ
⢠16.10 âSoftware Controlled Clock Stretching (STREN = 1)â
⢠16.11 âSlope Controlâ
⢠16.12 âClock Arbitrationâ
⢠16.13 âMulti-Master Communication, Bus Collision, and Bus Arbitration
Section 17.0 âUniversal
Removed the following sections, which are now available in the related
Asynchronous Receiver Transmitter section of the dsPIC33F Family Reference Manual:
(UART)â
⢠17.1 âUART Baud Rate Generatorâ
⢠17.2 âTransmitting in 8-bit Data Mode
⢠17.3 âTransmitting in 9-bit Data Mode
⢠17.4 âBreak and Sync Transmit Sequenceâ
⢠17.5 âReceiving in 8-bit or 9-bit Data Modeâ
⢠17.6 âFlow Control Using UxCTS and UxRTS Pinsâ
⢠17.7 âInfrared Supportâ
Section 18.0 âHigh-Speed 10-bit
Analog-to-Digital Converter (ADC)â
Removed IrDA references and Note 1, and updated the bit and bit value
descriptions for UTXINV (UxSTA<14>) in the UARTx Status and Control
Register (see Register 17-2).
Updated bit value information for A/D Control Register (see Register 18-1).
Updated TRGSRC6 bit value for Timer1 period match in the A/D Convert
Pair Control Register 3 (see Register 18-8).
© 2009 Microchip Technology Inc.
Preliminary
DS70318D-page 331
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