DSPIC33FJ64GS606-IPT Datasheet, PDF (323/456 Pages) Microchip Technology – 16-Bit Digital Signal Controllers with High-Speed PWM, ADC and Comparators

dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
REGISTER 22-7: ADCPC1: ADC CONVERT PAIR CONTROL REGISTER 1
R/W-0
IRQEN3
bit 15
R/W-0
PEND3
R/W-0
SWTRG3
R/W-0
R/W-0
R/W-0
R/W-0
TRGSRC3<4:0>⁽¹⁾
R/W-0
bit 8
R/W-0
IRQEN2
bit 7
R/W-0
PEND2
R/W-0
SWTRG2
R/W-0
R/W-0
R/W-0
R/W-0
TRGSRC2<4:0>
R/W-0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
IRQEN3: Interrupt Request Enable 3 bit
1 = Enables IRQ generation when requested conversion of Channels AN7 and AN6 is completed
0 = IRQ is not generated
PEND3: Pending Conversion Status 3 bit
1 = Conversion of Channels AN7 and AN6 is pending; set when selected trigger is asserted
0 = Conversion is complete
SWTRG3: Software Trigger 3 bit
1 = Starts conversion of AN7 and AN6 (if selected in TRGSRC bits)⁽¹⁾
This bit is automatically cleared by hardware when the PEND3 bit is set.
0 = Conversion has not started
Note 1: The trigger source must be set as a global software trigger prior to setting this bit to ‘1’. If other
conversions are in progress, the conversion is performed when the conversion resources are available.
 2009-2012 Microchip Technology Inc.
DS70591E-page 323