DSPIC33FJ64GS606-IPT Datasheet, PDF (146/456 Pages) Microchip Technology – 16-Bit Digital Signal Controllers with High-Speed PWM, ADC and Comparators

dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
REGISTER 7-17: IEC4: INTERRUPT ENABLE CONTROL REGISTER 4
U-0
U-0
U-0
U-0
R/W-0
U-0
—
—
—
—
QEI2IE
—
bit 15
R/W-0
PSESMIE
U-0
—
bit 8
U-0
R/W-0
U-0
U-0
U-0
R/W-0
R/W-0
U-0
—
C1TXIE⁽¹⁾
—
—
—
U2EIE
U1EIE
—
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-12
bit 11
bit 10
bit 9
bit 8-7
bit 6
bit 5-3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
QEI2IE: QEI2 Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
PSESMIE: PWM Special Event Secondary Match Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
C1TXIE: ECAN1 Transmit Data Request Interrupt Enable bit⁽¹⁾
1 = Interrupt request occurred
0 = Interrupt request not occurred
Unimplemented: Read as ‘0’
U2EIE: UART2 Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
U1EIE: UART1 Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
Note 1: Interrupts are disabled on devices without ECAN™ modules.
DS70591E-page 146
 2009-2012 Microchip Technology Inc.