DSPIC33FJ64GS606-IPT Datasheet, PDF (243/456 Pages) Microchip Technology – 16-Bit Digital Signal Controllers with High-Speed PWM, ADC and Comparators

dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
REGISTER 16-12: PDCx: PWM GENERATOR DUTY CYCLE x REGISTER^(1,2,3)
R/W-0
bit 15
R/W-0
R/W-0
R/W-0
R/W-0
PDCx<15:8>
R/W-0
R/W-0
R/W-0
bit 8
R/W-0
bit 7
R/W-0
R/W-0
R/W-0
R/W-0
PDCx<7:0>
R/W-0
R/W-0
R/W-0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
PDCx<15:0>: PWM Generator # Duty Cycle Value bits
Note 1:
2:
3:
In Independent PWM mode, the PDCx register controls the PWMxH duty cycle only. In the Complementary,
Redundant and Push-Pull PWM modes, the PDCx register controls the duty cycle of both the PWMxH and
PWMxL.
The smallest pulse width that can be generated on the PWM output corresponds to a value of 0x0008,
while the maximum pulse width generated corresponds to a value of Period – 0x0008.
As the duty cycle gets closer to 0% or 100% of the PWM period (0 to 40 ns, depending on the mode of
operation), PWM duty cycle resolution will increase from 1 to 3 LSBs.
REGISTER 16-13: SDCx: PWM SECONDARY DUTY CYCLE x REGISTER^(1,2,3)
R/W-0
bit 15
R/W-0
R/W-0
R/W-0
R/W-0
SDCx<15:8>
R/W-0
R/W-0
R/W-0
bit 8
R/W-0
bit 7
R/W-0
R/W-0
R/W-0
R/W-0
SDCx<7:0>
R/W-0
R/W-0
R/W-0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
SDCx<15:0>: Secondary Duty Cycle bits for PWMxL Output Pin
Note 1:
2:
3:
The SDCx register is used in Independent PWM mode only. When used in Independent PWM mode, the
SDCx register controls the PWMxL duty cycle.
The smallest pulse width that can be generated on the PWM output corresponds to a value of 0x0008,
while the maximum pulse width generated corresponds to a value of Period – 0x0008.
As the duty cycle gets closer to 0% or 100% of the PWM period (0 to 40 ns, depending on the mode of
operation), PWM duty cycle resolution will increase from 1 to 3 LSBs.
 2009-2012 Microchip Technology Inc.
DS70591E-page 243