KSZ8765CLX Datasheet, PDF (27/131 Pages) Microchip Technology – Integrated 5-Port 10/100-Managed Ethernet Switch with Gigabit GMII/RGMII and MII/RMII Interfaces

KSZ8765CLX
FIGURE 3-7:
SPI ACCESS TIMING
S__SC_{_}S_CS
S_S__{_}C_CL_LK_K
S_SD_IDI
SS__DDOO
S__SC_{_}S_CS
SS__CCLLKK
S_SD_IDI
S_S__{_}D_DO_O
0 1 0 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 TR D7 D6 D5 D4 D3 D2 D1 D0
W^WR^rIⁱT^teE
C^CO^oM^mM^mA^anN^dD
WritWe RAIdTdEress
ADDRESS
A) SPI Write Cycle
A) SPI WRITE CYCLE
WrWiteRDITaEta
DATA
0 1 1 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 TR
R^RE^eA^aD^d
C^CO^oM^mM^mA^anN^dD
ReadRAEdAdDress
ADDRESS
B)BS)PSI PRIeRaEd ACDycCleYCLE
D7 D6 D5 D4 D3 D2 D1 D0
ReaRdEDAaDta
DATA
FIGURE 3-8:
SPI MULTIPLE ACCESS TIMING
S_S__{_}C_CS_S
S_CLK
SS__DDI I
SS__DDOO
SS__CCSS
S_CLK
SS__DDI I
S_S__{_}C_CS_S
S_CLK
SS__DDI I
S^S_^_D^DO^O
SS__CCSS
S^S_^_C^CL^LK^K
S_DOO
0 1 0 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 TR D7 D6 D5 D4 D3 D2 D1 D0
W^WR^rIⁱT^teE
C^CO^oM^mM^mA^anN^dD
Wri^Wte^RA^Id^Td^Eress
ADDRESS
Wri^Wte^RB^ITy^Ete 1
BYTE 1
D7 D6 D5 D4 D3 D2 D1 D0
W^Writ^Re ^IB^Ty^Ete 2
BYTE 2
A) SPI Multiple Write Cycle
A) SPI MULTIPLE WRITE CYCLE
D7 D6 D5 D4 D3 D2 D1 D0
Wr^Wite^RB^ITy^Ete N
BYTE N
0 1 1 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 TR
C^CoOR^RmME^emM^aAdaADⁿN^dD
ReadRAEdAdDress
ADDRESS
D7 D6 D5 D4 D3 D2 D1 D0
Read_REB_Ayt_De 1
BYTE 1
D7 D6 D5 D4 D3 D2 D1 D0
Rea_Rd_EB_Ay_Dte 2
BYTE 2
B^B) ⁾S^SP^PI ^IM^MU^uL^lT^tipIP^leLE^ReR^aE^dA^CD^ycC^leYCLE
D7 D6 D5 D4 D3 D2 D1 D0
Read_REB_Ayt_De N
BYTE N
 2016 Microchip Technology Inc.
DS00002130A-page 27