PIC16F87-E Datasheet, PDF (22/228 Pages) Microchip Technology – 18/20/28-Pin Enhan lashMicrocontrollers with nanoWatt Technology

PIC16F87/88
2.2.2.4 PIE1 Register
This register contains the individual enable bits for the
peripheral interrupts.
Note: Bit PEIE (INTCON<6>) must be set to
enable any peripheral interrupt.
REGISTER 2-4:
PIE1: PERIPHERAL INTERRUPT ENABLE REGISTER 1 (ADDRESS 8Ch)
U-0
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
—
ADIE⁽¹⁾
RCIE
TXIE
SSPIE CCP1IE TMR2IE TMR1IE
bit 7
bit 0
bit 7 Unimplemented: Read as ‘0’
bit 6 ADIE: A/D Converter Interrupt Enable bit⁽¹⁾
1 = Enabled
0 = Disabled
Note 1: This bit is only implemented on the PIC16F88. The bit will read ‘0’ on the PIC16F87.
bit 5 RCIE: AUSART Receive Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 4 TXIE: AUSART Transmit Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 3 SSPIE: Synchronous Serial Port (SSP) Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 2 CCP1IE: CCP1 Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 1 TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enabled
0 = Disabled
bit 0 TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enabled
0 = Disabled
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
DS30487C-page 20
 2005 Microchip Technology Inc.