PIC16F87-E Datasheet, PDF (109/228 Pages) Microchip Technology – 18/20/28-Pin Enhan lashMicrocontrollers with nanoWatt Technology

PIC16F87/88
FIGURE 11-7:
ASYNCHRONOUS RECEPTION WITH ADDRESS DETECT
Start
RB2/SDO/RX/DT pin bit bit 0 bit 1
Start
bit 8 Stop bit bit 0
bit
bit 8 Stop
bit
Load RSR
Read
Bit 8 = 0, Data Byte
Bit 8 = 1, Address Byte
Word 1
RCREG
RCIF
Note:
This timing diagram shows a data byte followed by an address byte. The data byte is not read into the RCREG (Receive Buffer)
because ADDEN = 1.
FIGURE 11-8:
ASYNCHRONOUS RECEPTION WITH ADDRESS BYTE FIRST
RB2/SDO/RX/DT pin
Load RSR
Read
Start
bit bit 0 bit 1
Start
bit 8 Stop bit bit 0
bit
bit 8 Stop
bit
Bit 8 = 1, Address Byte
Bit 8 = 0, Data Byte
Word 1
RCREG
RCIF
Note:
This timing diagram shows a data byte followed by an address byte. The data byte is not read into the RCREG (Receive Buffer)
because ADDEN was not updated and still = 0.
TABLE 11-9: REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Value on
all other
Resets
0Bh, 8Bh, INTCON GIE PEIE TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 0000 000x 0000 000u
10Bh,18Bh
0Ch
PIR1
— ADIF⁽¹⁾ RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF -000 0000 -000 0000
18h
RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 0000 000x 0000 000x
1Ah
RCREG AUSART Receive Data Register
0000 0000 0000 0000
8Ch
PIE1
— ADIE⁽¹⁾ RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE -000 0000 -000 0000
98h
TXSTA CSRC TX9 TXEN SYNC — BRGH TRMT TX9D 0000 -010 0000 -010
99h
SPBRG Baud Rate Generator Register
0000 0000 0000 0000
Legend: x = unknown, - = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous reception.
Note 1: This bit is only implemented on the PIC16F88. The bit will read ‘0’ on the PIC16F87.
 2005 Microchip Technology Inc.
DS30487C-page 107