PIC24FJ256GA110 Datasheet, PDF (2/22 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit General Purpose Flash Microcontrollers with Peripheral Pin Select

PIC24FJ256GA110 FAMILY
TABLE 2:
Module
SILICON ISSUE SUMMARY
Feature
Item
Number
Issue Summary
Affected Revisions⁽¹⁾
A3 A5 A6
Core
RAM Operation
1. RAM issues in Doze mode.
X
X
X
Core
BOR
2. BOR issues in enabled on-chip regulator.
X
JTAG
Device 
Programming
3. JTAG issues in device programming.
X
X
X
UART
—
4. Framing errors in UART.
X
I/O
PORTB
5. RB5 issues in open-drain operation.
X
SPI
Master mode
6. Early one-half clock cycles.
X
CTMU
—
7. CTMU issues as a trigger source.
X
UART
UERIF Interrupt
8. UART error interrupt issue.
X
UART
FIFO Error Flags
9. Error bits settings for receive FIFO.
X
SPI
UART
Enhanced Buffer 10. Errors in enhanced buffer interrupts.
X
modes
IrDA^®
11. Issues in 8-bit mode using IrDA^® endec.
X
UART
IrDA
12. Framing errors in 8-bit mode using IrDA
X
endec.
UART
IrDA
13. Transmission errors in 9-bit mode using IrDA X
endec.
Core
Instruction Set
14. Read-After-Write stall conditions inside a
REPEAT loop.
X
X
X
Memory
Program Space  15. False error trap conditions when accessing
X
Visibility
data in the PSV.
ICSP™
—
16. Inability of the ICSP/ICD port pair to read or
X
program.
RTCC
I²C™
Module
I²C™
Module
—
Master mode
Slave mode
17. Unexpected decrementing of the Alarm
X
Repeat Counter.
18. Acknowledgement issues in addressing slave X
device.
19. Acknowledgement issues in Slave mode.
X
A/D Converter
—
20. Debugging issues on 64-pin devices.
X
SPI
Enhanced Buffer 21. FIFO transfer issues in Enhanced Master
X
mode
mode.
Core
Code Protection
22. Applications unable to write when General
X
Segment Code Protection has been enabled.
SPI/PPS
—
23. ALTRP/ASCK1 functionality is not supported. X
Oscillator
LPRC
24. Issues with LPRC automatic restart following X
BOR.
CTMU
A/D Trigger
25. Issues in the CTMU in triggering automatic
X
A/D conversion.
Output 
Compare
—
26. Single missed compare events under certain X
conditions.
Interrupts
INTx
27. External interrupts missed when writing to
INTCON2.
X
X
X
A/D Converter
—
28. Module continues to draw current when
disabled.
X
X
X
Note 1: Only those issues indicated in the last column apply to the current silicon revision.
DS80368N-page 2
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