DSPIC30F5013-20I Datasheet, PDF (197/220 Pages) Microchip Technology – 16-bit Digital Signal Controllers

dsPIC30F5011/5013
TABLE 23-36: I²C™ BUS DATA TIMING REQUIREMENTS (SLAVE MODE)
AC CHARACTERISTICS
Standard Operating Conditions: 2.5V to 5.5V
(unless otherwise stated)
Operating temperature -40°C ≤TA ≤+85°C for Industrial
-40°C ≤TA ≤+125°C for Extended
Param
No.
Symbol
Characteristic
Min
Max Units
Conditions
IS10 TLO:SCL Clock Low Time 100 kHz mode
4.7
—
μs
400 kHz mode
1.3
—
μs
1 MHz mode⁽¹⁾
0.5
IS11 THI:SCL Clock High Time 100 kHz mode
4.0
—
μs
—
μs
400 kHz mode
0.6
—
μs
1 MHz mode⁽¹⁾
0.5
—
μs
IS20 TF:SCL SDA and SCL 100 kHz mode
—
300 ns
Fall Time
400 kHz mode 20 + 0.1 CB 300 ns
1 MHz mode⁽¹⁾
—
100 ns
IS21
TR:SCL SDA and SCL
Rise Time
100 kHz mode
—
1000 ns
400 kHz mode 20 + 0.1 CB 300 ns
1 MHz mode⁽¹⁾
—
300 ns
IS25 TSU:DAT Data Input
100 kHz mode
250
Setup Time
400 kHz mode
100
1 MHz mode⁽¹⁾
100
—
ns
—
ns
—
ns
IS26 THD:DAT Data Input
100 kHz mode
0
—
ns
Hold Time
400 kHz mode
0
0.9 μs
1 MHz mode⁽¹⁾
0
0.3 μs
IS30 TSU:STA Start Condition 100 kHz mode
4.7
Setup Time
400 kHz mode
0.6
1 MHz mode⁽¹⁾
0.25
—
μs
—
μs
—
μs
IS31 THD:STA Start Condition 100 kHz mode
4.0
Hold Time
400 kHz mode
0.6
1 MHz mode⁽¹⁾
0.25
—
μs
—
μs
—
μs
IS33 TSU:STO Stop Condition 100 kHz mode
4.7
Setup Time
400 kHz mode
0.6
1 MHz mode⁽¹⁾
0.6
—
μs
—
μs
—
μs
IS34 THD:STO Stop Condition 100 kHz mode
4000
—
ns
Hold Time
400 kHz mode
600
1 MHz mode⁽¹⁾
250
—
ns
ns
IS40
TAA:SCL Output Valid
From Clock
100 kHz mode
400 kHz mode
1 MHz mode⁽¹⁾
0
3500 ns
0
1000 ns
0
350 ns
IS45 TBF:SDA Bus Free Time 100 kHz mode
4.7
—
μs
400 kHz mode
1.3
1 MHz mode⁽¹⁾
0.5
—
μs
—
μs
IS50 CB
Bus Capacitive Loading
—
400 pF
Note 1: Maximum pin capacitance = 10 pF for all I²C™ pins (for 1 MHz mode only).
Device must operate at a
minimum of 1.5 MHz
Device must operate at a
minimum of 10 MHz.
—
Device must operate at a
minimum of 1.5 MHz
Device must operate at a
minimum of 10 MHz
CB is specified to be from
10 to 400 pF
CB is specified to be from
10 to 400 pF
Only relevant for repeated
Start condition
After this period the first
clock pulse is generated
Time the bus must be free
before a new transmission
can start
© 2011 Microchip Technology Inc.
DS70116J-page 197