MCP19111 Datasheet, PDF (181/222 Pages) Microchip Technology – Digitally Enhanced Power Analog Controller with Integrated Synchronous Driver

MCP19111
27.6 BAUD RATE GENERATOR
The MSSP module has a Baud Rate Generator
available for clock generation in I²C Master mode. The
Baud Rate Generator (BRG) reload value is placed in
the SSPADD register (Register 27-7). When a write
occurs to SSPBUF, the Baud Rate Generator will
automatically begin counting down.
Once the given operation is complete, the internal clock
will automatically stop counting and the clock pin will
remain in its last state.
An internal signal “Reload” in Figure 27-32 triggers the
value from SSPADD to be loaded into the BRG counter.
This occurs twice for each oscillation of the module
clock line. The logic dictating when the reload signal is
asserted depends on the mode the MSSP is being
operated in.
Table 27-2 demonstrates clock rates based on
instruction cycles and the BRG value loaded into
SSPADD.
EQUATION 27-1:
FCLOCK = _---S---S----P----A--F--D--O--D---S---C+------1---_---_--4----_
FIGURE 27-32: BAUD RATE GENERATOR BLOCK DIAGRAM
SSPM<3:0>
SSPADD<7:0>
SSPM<3:0>
SCL
Reload
Control
Reload
SSPCLK
BRG Down Counter
F_OSC/2
Note:
Values of 0x00, 0x01 and 0x02 are not valid
for SSPADD when used as a Baud Rate
Generator for I²C. This is an implementation
limitation.
TABLE 27-2: MSSP CLOCK RATE W/BRG
Note 1:
F_OSC
F_CY
BRG Value
F_CLOCK
(2 Rollovers of BRG)
8 MHz
2 MHz
04h
400 kHz⁽¹⁾
8 MHz
2 MHz
0Bh
166 kHz
8 MHz
2 MHz
13h
100 kHz
The I²C interface does not conform to the 400 kHz I²C specification (which applies to rates greater than
100 kHz) in all details, but may be used with care where higher rates are required by the application.
 2013 Microchip Technology Inc.
DS22331A-page 181