MCP19111 Datasheet, PDF (143/222 Pages) Microchip Technology – Digitally Enhanced Power Analog Controller with Integrated Synchronous Driver

MCP19111
26.1.4 PWM DUTY CYCLE (D_CLOCK)
The PWM duty cycle (D_CLOCK) is specified by writing
to the PWMRL register. Up to 8-bit resolution is
available. The following equation is used to calculate
the PWM duty cycle (D_CLOCK):
EQUATION 26-4:
26.2 Operation during Sleep
When the device is placed in Sleep, the allocated
timer will not increment and the state of the module will
not change. If the CLKPIN pin is driving a value, it will
continue to drive that value. When the device wakes
up, it will continue from this state.
PWM DUTY CYCLE=PWMRL x T_OSC x (T2 PRESCALE VALUE)
The PWMRL bits can be written to at any time, but the
duty cycle value is not latched into PWMRH until after
a match between PR2 and TMR2 occurs.
TABLE 26-1: SUMMARY OF REGISTERS ASSOCIATED WITH PWM MODULE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
APFCON
—
—
—
—
—
—
—
CLKSEL
T2CON
—
—
—
—
— TMR2ON T2CKPS1 T2CKPS0
PR2
Timer2 Module Period Register
PWMRL
PWM Register Low Byte
PWMPHL
SLAVE Phase Shift Byte
BUFFCON MLTPH2 MLTPH1 MLTPH0 ASEL4 ASEL3 ASEL2 ASEL1 ASEL0
Legend: — = Unimplemented locations, read as ‘0’. Shaded cells are not used by Capture mode.
* Page provides register information.
110
139
138*
141*
141*
56
 2013 Microchip Technology Inc.
DS22331A-page 143